On 2016-04-28 09:05, Peter Xu wrote: > v5 changes: > - patch 10: add vector checking for IOAPIC interrupts (this may help > debug in the future, will only generate warning if specify > IOMMU_DEBUG) > - patch 13: replace error_report() with a trace. [Jan] > - patch 14: rename parameter "intr" to "intremap", to be aligned > with kernel parameter [Jan] > - patch 15: fix comments for vtd_iec_notify_fn > - patch 17 & 18 (added): fix issue when IR enabled with devices > using level-triggered interrupts, like e1000. Adding it to the end > of series, since this issue never happen without IR. > > Patch 17 adds read-only check for IOAPIC entries. > Patch 18 clears remote IRR bit when entry configured as > edge-triggered.
IIUC, your series does not address irqfd yet, only by chance if the target is an IOAPIC pin for which you set up routes now. Correct? Instead of fiddling with irq routes for the IOAPIC - where we don't need it -, I would suggest to do the following: Send IOAPIC events via kvm_irqchip_send_msi to the kernel. Only irqfd users (vhost, vfio) should use the pattern you are now applying to the IOAPIC: establish static routes as an irqfd is set up, and that route should be translated by the iommu first, register an IEC notifier to update any affected route when the iommu translation changes. Jan
