On 26/05/16 14:21, Paolo Bonzini wrote: > > On 26/05/2016 12:42, Sergey Fedorov wrote: >> I'm afraid even our recent efforts in >> multi-threaded TCG won't change the situation. The problem is that it >> would require to translate somehow ARM's exclusive access monitor to x86 >> model. >> > The cmpxchg-based variant would work. It doesn't implement LL/SC > exactly, but it works fine if the program is written against GCC atomic > builtins.
I'm afraid, GCC can still generate ldrex/strex pair for __atomic_compare_exchange(): $ cat a.c #define atomic_cmpxchg(ptr, old, new) \ ({ \ typeof(*ptr) _old = (old), _new = (new); \ __atomic_compare_exchange(ptr, &_old, &_new, 0, \ __ATOMIC_SEQ_CST, __ATOMIC_SEQ_CST); \ _old; \ }) int cmpexchg(int *ptr, int old, int new) { return atomic_cmpxchg(ptr, old, new); } $ arm-linux-gnueabi-gcc -march=armv7-a -O2 -c a.c $ arm-linux-gnueabi-objdump -d a.o a.o: file format elf32-littlearm Disassembly of section .text: 00000000 <cmpexchg>: 0: e24dd008 sub sp, sp, #8 4: e58d1004 str r1, [sp, #4] 8: f57ff05f dmb sy c: e1903f9f ldrex r3, [r0] 10: e1530001 cmp r3, r1 14: 1a000002 bne 24 <cmpexchg+0x24> 18: e180cf92 strex ip, r2, [r0] 1c: e35c0000 cmp ip, #0 20: 1afffff9 bne c <cmpexchg+0xc> 24: f57ff05f dmb sy 28: e1a00003 mov r0, r3 2c: e28dd008 add sp, sp, #8 30: e12fff1e bx lr Kind regards, Sergey