Quoting Thomas Huth (2016-06-07 10:39:37) > The current pcr_mask values are ambiguous: Should these be the mask > that defines valid bits in the PCR register? Or should these rather > indicate which compatibility levels are possible? Anyway, POWER6 and > POWER7 should certainly not use the same values here. So let's > introduce an additional variable "pcr_supported" here which is > used to indicate the valid compatibility levels, and use pcr_mask > to signal the valid bits in the PCR register. > > Signed-off-by: Thomas Huth <th...@redhat.com> > --- > hw/ppc/spapr_hcall.c | 4 ++-- > target-ppc/cpu-qom.h | 3 ++- > target-ppc/cpu.h | 1 + > target-ppc/translate_init.c | 6 ++++-- > 4 files changed, 9 insertions(+), 5 deletions(-) > > diff --git a/hw/ppc/spapr_hcall.c b/hw/ppc/spapr_hcall.c > index bb8f4de..cc16249 100644 > --- a/hw/ppc/spapr_hcall.c > +++ b/hw/ppc/spapr_hcall.c > @@ -934,9 +934,9 @@ static void cas_handle_compat_cpu(PowerPCCPUClass *pcc, > uint32_t pvr, > } > > /* If it is a logical PVR, try to determine the highest level */ > - is205 = (pcc->pcr_mask & PCR_COMPAT_2_05) && > + is205 = (pcc->pcr_supported & PCR_COMPAT_2_05) && > (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_05)); > - is206 = (pcc->pcr_mask & PCR_COMPAT_2_06) && > + is206 = (pcc->pcr_supported & PCR_COMPAT_2_06) && > ((lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06)) || > (lvl == get_compat_level(CPU_POWERPC_LOGICAL_2_06_PLUS))); > > diff --git a/target-ppc/cpu-qom.h b/target-ppc/cpu-qom.h > index 07358aa..969ecdf 100644 > --- a/target-ppc/cpu-qom.h > +++ b/target-ppc/cpu-qom.h > @@ -165,7 +165,8 @@ typedef struct PowerPCCPUClass { > > uint32_t pvr; > bool (*pvr_match)(struct PowerPCCPUClass *pcc, uint32_t pvr); > - uint64_t pcr_mask; > + uint64_t pcr_mask; /* Available bits in PCR register */ > + uint64_t pcr_supported; /* Bits for supported PowerISA versions */ > uint32_t svr; > uint64_t insns_flags; > uint64_t insns_flags2; > diff --git a/target-ppc/cpu.h b/target-ppc/cpu.h > index c2962d7..c00a3b5 100644 > --- a/target-ppc/cpu.h > +++ b/target-ppc/cpu.h > @@ -2202,6 +2202,7 @@ enum { > enum { > PCR_COMPAT_2_05 = 1ull << (63-62), > PCR_COMPAT_2_06 = 1ull << (63-61), > + PCR_COMPAT_2_07 = 1ull << (63-60),
This gets introduced somewhat subtly here, maybe move it to patch 5? > PCR_VEC_DIS = 1ull << (63-0), /* Vec. disable (bit NA since > POWER8) */ > PCR_VSX_DIS = 1ull << (63-1), /* VSX disable (bit NA since > POWER8) */ > PCR_TM_DIS = 1ull << (63-2), /* Trans. memory disable (POWER8) > */ > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index a1db500..fa09183 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -8365,7 +8365,8 @@ POWERPC_FAMILY(POWER7)(ObjectClass *oc, void *data) > dc->desc = "POWER7"; > dc->props = powerpc_servercpu_properties; > pcc->pvr_match = ppc_pvr_match_power7; > - pcc->pcr_mask = PCR_COMPAT_2_05 | PCR_COMPAT_2_06; > + pcc->pcr_mask = PCR_VEC_DIS | PCR_VSX_DIS | PCR_COMPAT_2_05; > + pcc->pcr_supported = PCR_COMPAT_2_06 | PCR_COMPAT_2_05; > pcc->init_proc = init_proc_POWER7; > pcc->check_pow = check_pow_nocheck; > pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB | > @@ -8445,7 +8446,8 @@ POWERPC_FAMILY(POWER8)(ObjectClass *oc, void *data) > dc->desc = "POWER8"; > dc->props = powerpc_servercpu_properties; > pcc->pvr_match = ppc_pvr_match_power8; > - pcc->pcr_mask = PCR_COMPAT_2_05 | PCR_COMPAT_2_06; > + pcc->pcr_mask = PCR_TM_DIS | PCR_COMPAT_2_06 | PCR_COMPAT_2_05; > + pcc->pcr_supported = PCR_COMPAT_2_07 | PCR_COMPAT_2_06 | PCR_COMPAT_2_05; > pcc->init_proc = init_proc_POWER8; > pcc->check_pow = check_pow_nocheck; > pcc->insns_flags = PPC_INSNS_BASE | PPC_ISEL | PPC_STRING | PPC_MFTB | > -- > 1.8.3.1 > >