Hello all, This patch tries to solve a problem whereby real AMD IOMMUs exhibit both PCI and Platform device properties. AMD IOMMU properties that conflict with conventional PCI devices' features include the fact that its not a BusMaster device and reserves MMIO region without a BAR register among others.
There is some already ongoing work on Intel IOMMU Interrupt remapping with implements an IOMMU base class[1], as a platform device(which means the moment I inherit from this class my device loses it's PCI properties). I am therefore forced to find a way to combine both PCI and platform features(which I had previously avoided) into AMD IOMMU. X86-IOMMU(common code) | | / \ / \ Intel IOMMU AMD IOMMU This patch implements a stripped down sample of how I plan to solve this issue. It basically implements PCI device which serves to 'steal' PCI config space while the main device remains a platform device. The platform device maintains a reference to the PCI device and hence the relevant PCI config space. This device will also require [2] to work. Looking forward to your comments! [1] http://thread.gmane.org/gmane.comp.emulators.qemu/414510 [2] http://thread.gmane.org/gmane.comp.emulators.qemu/413018 David Kiarie (1): hw/i386: Composite Bus and PCI device hw/i386/compositedevice.c | 113 ++++++++++++++++++++++++++++++++++++++++++++++ 1 file changed, 113 insertions(+) create mode 100644 hw/i386/compositedevice.c -- 2.1.4