This is an update of a patch set last posted in September, and partially reviewed by Bastian at the time.
r~ Richard Henderson (25): target-openrisc: Always enable OPENRISC_DISAS target-openrisc: Streamline arithmetic and OVE target-openrisc: Invert the decoding in dec_calc target-openrisc: Keep SR_F in a separate variable target-openrisc: Use movcond where appropriate target-openrisc: Put SR[OVE] in TB flags target-openrisc: Keep SR_CY and SR_OV in a separate variables target-openrisc: Set flags on helpers target-openrisc: Implement ff1 and fl1 for 64-bit target-openrisc: Represent MACHI:MACLO as a single unit target-openrisc: Rationalize immediate extraction target-openrisc: Enable m[tf]spr from user mode target-openrisc: Enable trap, csync, msync, psync for user mode target-openrisc: Implement muld, muldu, macu, msbu target-openrisc: Fix madd target-openrisc: Write back result before FPE exception target-openrisc: Implement lwa, swa target-openrisc: Implement l.adrp target-openrisc: Tidy ppc/npc implementation target-openrisc: Optimize l.jal to next target-openrisc: Tidy insn dumping target-openrisc: Tidy handling of delayed branches target-openrisc: Optimize for r0 being zero target-openrisc: Generate goto_tb for direct branches target-openrisc: Generate goto_tb for conditional branches linux-user/main.c | 45 + target-openrisc/cpu.c | 1 + target-openrisc/cpu.h | 54 +- target-openrisc/exception_helper.c | 32 + target-openrisc/fpu_helper.c | 286 ++---- target-openrisc/gdbstub.c | 17 +- target-openrisc/helper.h | 42 +- target-openrisc/int_helper.c | 57 +- target-openrisc/interrupt.c | 7 +- target-openrisc/interrupt_helper.c | 4 +- target-openrisc/machine.c | 5 +- target-openrisc/mmu.c | 1 + target-openrisc/sys_helper.c | 90 +- target-openrisc/translate.c | 1778 +++++++++++++++++------------------- 14 files changed, 1108 insertions(+), 1311 deletions(-) -- 2.5.5
