From: Lluís Vilanova <vilan...@ac.upc.edu> Information is tracked inside the TCGContext structure, and later used by tracing events with the 'tcg' and 'vcpu' properties.
The 'cpu' field is used to check tracing of translation-time events ("*_trans"). The 'tcg_env' field is used to pass it to execution-time events ("*_exec"). Signed-off-by: Lluís Vilanova <vilan...@ac.upc.edu> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> Reviewed-by: Richard Henderson <r...@twiddle.net> Message-id: 146549350162.18437.3033661139638458143.st...@fimbulvetr.bsc.es Signed-off-by: Stefan Hajnoczi <stefa...@redhat.com> --- target-alpha/translate.c | 1 + target-arm/translate.c | 1 + target-cris/translate.c | 1 + target-cris/translate_v10.c | 1 + target-i386/translate.c | 1 + target-lm32/translate.c | 1 + target-m68k/translate.c | 1 + target-microblaze/translate.c | 1 + target-mips/translate.c | 1 + target-moxie/translate.c | 1 + target-openrisc/translate.c | 1 + target-ppc/translate.c | 1 + target-s390x/translate.c | 1 + target-sh4/translate.c | 1 + target-sparc/translate.c | 1 + target-tilegx/translate.c | 1 + target-tricore/translate.c | 1 + target-unicore32/translate.c | 1 + target-xtensa/translate.c | 1 + tcg/tcg.h | 4 ++++ translate-all.c | 2 ++ 21 files changed, 25 insertions(+) diff --git a/target-alpha/translate.c b/target-alpha/translate.c index f9b2426..243567b 100644 --- a/target-alpha/translate.c +++ b/target-alpha/translate.c @@ -151,6 +151,7 @@ void alpha_translate_init(void) done_init = 1; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < 31; i++) { cpu_std_ir[i] = tcg_global_mem_new_i64(cpu_env, diff --git a/target-arm/translate.c b/target-arm/translate.c index 3e71467..bd5d5cb 100644 --- a/target-arm/translate.c +++ b/target-arm/translate.c @@ -85,6 +85,7 @@ void arm_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < 16; i++) { cpu_R[i] = tcg_global_mem_new_i32(cpu_env, diff --git a/target-cris/translate.c b/target-cris/translate.c index cc51569..f4a8d7d 100644 --- a/target-cris/translate.c +++ b/target-cris/translate.c @@ -3374,6 +3374,7 @@ void cris_initialize_tcg(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cc_x = tcg_global_mem_new(cpu_env, offsetof(CPUCRISState, cc_x), "cc_x"); cc_src = tcg_global_mem_new(cpu_env, diff --git a/target-cris/translate_v10.c b/target-cris/translate_v10.c index 06ba1ef..4707a18 100644 --- a/target-cris/translate_v10.c +++ b/target-cris/translate_v10.c @@ -1250,6 +1250,7 @@ void cris_initialize_crisv10_tcg(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cc_x = tcg_global_mem_new(cpu_env, offsetof(CPUCRISState, cc_x), "cc_x"); cc_src = tcg_global_mem_new(cpu_env, diff --git a/target-i386/translate.c b/target-i386/translate.c index f010022..7dea18b 100644 --- a/target-i386/translate.c +++ b/target-i386/translate.c @@ -8152,6 +8152,7 @@ void tcg_x86_init(void) initialized = true; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_cc_op = tcg_global_mem_new_i32(cpu_env, offsetof(CPUX86State, cc_op), "cc_op"); cpu_cc_dst = tcg_global_mem_new(cpu_env, offsetof(CPUX86State, cc_dst), diff --git a/target-lm32/translate.c b/target-lm32/translate.c index 526b437..2d8caeb 100644 --- a/target-lm32/translate.c +++ b/target-lm32/translate.c @@ -1202,6 +1202,7 @@ void lm32_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < ARRAY_SIZE(cpu_R); i++) { cpu_R[i] = tcg_global_mem_new(cpu_env, diff --git a/target-m68k/translate.c b/target-m68k/translate.c index 83db42a..ecd5e5c 100644 --- a/target-m68k/translate.c +++ b/target-m68k/translate.c @@ -78,6 +78,7 @@ void m68k_tcg_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; #define DEFO32(name, offset) \ QREG_##name = tcg_global_mem_new_i32(cpu_env, \ diff --git a/target-microblaze/translate.c b/target-microblaze/translate.c index c54304a..80098ec 100644 --- a/target-microblaze/translate.c +++ b/target-microblaze/translate.c @@ -1878,6 +1878,7 @@ void mb_tcg_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; env_debug = tcg_global_mem_new(cpu_env, offsetof(CPUMBState, debug), diff --git a/target-mips/translate.c b/target-mips/translate.c index f420680..aaa1d02 100644 --- a/target-mips/translate.c +++ b/target-mips/translate.c @@ -20005,6 +20005,7 @@ void mips_tcg_init(void) return; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; TCGV_UNUSED(cpu_gpr[0]); for (i = 1; i < 32; i++) diff --git a/target-moxie/translate.c b/target-moxie/translate.c index 58200c2..0660b44 100644 --- a/target-moxie/translate.c +++ b/target-moxie/translate.c @@ -106,6 +106,7 @@ void moxie_translate_init(void) return; } cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_pc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUMoxieState, pc), "$pc"); for (i = 0; i < 16; i++) diff --git a/target-openrisc/translate.c b/target-openrisc/translate.c index c08876b..28c9446 100644 --- a/target-openrisc/translate.c +++ b/target-openrisc/translate.c @@ -78,6 +78,7 @@ void openrisc_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_sr = tcg_global_mem_new(cpu_env, offsetof(CPUOpenRISCState, sr), "sr"); env_flags = tcg_global_mem_new_i32(cpu_env, diff --git a/target-ppc/translate.c b/target-ppc/translate.c index b689475..1280184 100644 --- a/target-ppc/translate.c +++ b/target-ppc/translate.c @@ -88,6 +88,7 @@ void ppc_translate_init(void) return; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; p = cpu_reg_names; cpu_reg_names_size = sizeof(cpu_reg_names); diff --git a/target-s390x/translate.c b/target-s390x/translate.c index ce5db5d..3c3487a 100644 --- a/target-s390x/translate.c +++ b/target-s390x/translate.c @@ -169,6 +169,7 @@ void s390x_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; psw_addr = tcg_global_mem_new_i64(cpu_env, offsetof(CPUS390XState, psw.addr), "psw_addr"); diff --git a/target-sh4/translate.c b/target-sh4/translate.c index 7518eb5..ca80cf7 100644 --- a/target-sh4/translate.c +++ b/target-sh4/translate.c @@ -101,6 +101,7 @@ void sh4_translate_init(void) return; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < 24; i++) cpu_gregs[i] = tcg_global_mem_new_i32(cpu_env, diff --git a/target-sparc/translate.c b/target-sparc/translate.c index afd306f..afd46b8 100644 --- a/target-sparc/translate.c +++ b/target-sparc/translate.c @@ -5404,6 +5404,7 @@ void gen_intermediate_code_init(CPUSPARCState *env) inited = 1; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_regwptr = tcg_global_mem_new_ptr(cpu_env, offsetof(CPUSPARCState, regwptr), diff --git a/target-tilegx/translate.c b/target-tilegx/translate.c index bdea673..11c9732 100644 --- a/target-tilegx/translate.c +++ b/target-tilegx/translate.c @@ -2443,6 +2443,7 @@ void tilegx_tcg_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_pc = tcg_global_mem_new_i64(cpu_env, offsetof(CPUTLGState, pc), "pc"); for (i = 0; i < TILEGX_R_COUNT; i++) { cpu_regs[i] = tcg_global_mem_new_i64(cpu_env, diff --git a/target-tricore/translate.c b/target-tricore/translate.c index eb3deac..9a50df9 100644 --- a/target-tricore/translate.c +++ b/target-tricore/translate.c @@ -8835,6 +8835,7 @@ void tricore_tcg_init(void) return; } cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; /* reg init */ for (i = 0 ; i < 16 ; i++) { cpu_gpr_a[i] = tcg_global_mem_new(cpu_env, diff --git a/target-unicore32/translate.c b/target-unicore32/translate.c index c4d45fa..09354f9 100644 --- a/target-unicore32/translate.c +++ b/target-unicore32/translate.c @@ -70,6 +70,7 @@ void uc32_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; for (i = 0; i < 32; i++) { cpu_R[i] = tcg_global_mem_new_i32(cpu_env, diff --git a/target-xtensa/translate.c b/target-xtensa/translate.c index 2a8e5c5..4c1e487 100644 --- a/target-xtensa/translate.c +++ b/target-xtensa/translate.c @@ -219,6 +219,7 @@ void xtensa_translate_init(void) int i; cpu_env = tcg_global_reg_new_ptr(TCG_AREG0, "env"); + tcg_ctx.tcg_env = cpu_env; cpu_pc = tcg_global_mem_new_i32(cpu_env, offsetof(CPUXtensaState, pc), "pc"); diff --git a/tcg/tcg.h b/tcg/tcg.h index 909db3f..66d7fc0 100644 --- a/tcg/tcg.h +++ b/tcg/tcg.h @@ -599,6 +599,10 @@ struct TCGContext { TBContext tb_ctx; + /* Track which vCPU triggers events */ + CPUState *cpu; /* *_trans */ + TCGv_env tcg_env; /* *_exec */ + /* The TCGBackendData structure is private to tcg-target.inc.c. */ struct TCGBackendData *be; diff --git a/translate-all.c b/translate-all.c index 3f402df..eaa95e4 100644 --- a/translate-all.c +++ b/translate-all.c @@ -1182,7 +1182,9 @@ TranslationBlock *tb_gen_code(CPUState *cpu, tcg_func_start(&tcg_ctx); + tcg_ctx.cpu = ENV_GET_CPU(env); gen_intermediate_code(env, tb); + tcg_ctx.cpu = NULL; trace_translate_block(tb, tb->pc, tb->tc_ptr); -- 2.5.5