it did compile for me. how do you compile? what machine? On Sun, Jun 19, 2016 at 8:45 PM, Richard Henderson <r...@twiddle.net> wrote:
> On 06/18/2016 12:55 PM, Michael Rolnik wrote: > >> This series of patches adds 8bit AVR cores to QEMU. >> All instruction, except BREAK/DES/SPM/SPMX, are implemented. Not fully >> tested yet. >> However I was able to execute simple code with functions. e.g fibonacci >> calculation. >> This series of patches include a non real, sample board. >> No fuses support yet. PC is set to 0 at reset. >> >> the patches include the following >> 1. just a basic 8bit AVR CPU, without instruction decoding or translation >> 2. CPU features which allow define the following 8bit AVR cores >> avr1 >> avr2 avr25 >> avr3 avr31 avr35 >> avr4 >> avr5 avr51 >> avr6 >> xmega2 xmega4 xmega5 xmega6 xmega7 >> 3. a definition of sample machine with SRAM, FLASH and CPU which allows >> to execute simple code >> 4. encoding for all AVR instructions >> 5. interrupt handling >> 6. helpers for IN, OUT, SLEEP, WBR & unsupported instructions >> 7. a decoder which given an opcode decides what istruction it is >> 8. translation of AVR instruction into TCG >> 9. all features together >> >> changes since v3 >> 1. rampD/X/Y/Z registers are encoded as 0x00ff0000 (instead of >> 0x000000ff) for faster address manipulaton >> 2. ffs changed to ctz32 >> 3. duplicate code removed at avr_cpu_do_interrupt >> 4. using andc instead of not + and >> 5. fixing V flag calculation in varios instructions >> 6. freeing local variables in PUSH >> 7. tcg_const_local_i32 -> tcg_const_i32 >> 8. using sextract32 instead of my implementation >> 9. fixing BLD instruction >> 10.xor(r) instead of 0xff - r at COM >> 11.fixing MULS/MULSU not to modify inputs' content >> 12.using SUB for NEG >> 13.fixing tcg_gen_qemu_ld/st call in XCH >> >> changes since v4 >> 1. target is now defined as big endian in order to optimize >> push_ret/pop_ret >> 2. all style warnings are fixed >> 3. adding cpu_set/get_sreg functions >> 4. simplifying gen_goto_tb as there is no real paging >> 5. env->pc -> env->pc_w >> 6. making flag dump more compact >> 7. more spacing >> 8. renaming CODE/DATA_INDEX -> MMU_CODE/DATA_IDX >> 9. removing avr_set_feature >> 10. SPL/SPH set bug fix >> 11. switching stb_phys to cpu_stb_data >> 12. cleaning up avr_decode >> 13. saving sreg, rampD/X/Y/Z, eind in HW format (savevm) >> 14. saving CPU features (savevm) >> >> changes since v5 >> 1. BLD bug fix >> 2. decoder generator is added >> >> chages since v6 >> 1. using cpu_get_sreg/cpu_set_sreg in >> avr_cpu_gdb_read_register/avr_cpu_gdb_write_register >> 2. configure the target as little endian because otherwise GDB does not >> work >> 3. fixing and testing gen_push_ret/gen_pop_ret >> >> changes since v7 >> 1. folding back v6 >> 2. logging at helper_outb and helper_inb are done for non supported yet >> registers only >> 3. MAINTAINERS updated >> > > Problems: > > (1) This doesn't compile. > > qemu/hw/avr/sample.c:66:13: error: variable ‘cpu_avr’ set but not used > [-Werror=unused-but-set-variable] > qemu/hw/avr/sample-io.c:121:30: error: comparison of unsigned expression > >= 0 is always true [-Werror=type-limits] > qemu/hw/avr/sample-io.c:148:30: error: comparison of unsigned expression > >= 0 is always true [-Werror=type-limits] > qemu/target-avr/translate-inst.c:199:6: error: old-style function > definition [-Werror=old-style-definition] > qemu/target-avr/translate-inst.c:206:6: error: old-style function > definition [-Werror=old-style-definition] > qemu/target-avr/translate-inst.c:248:6: error: old-style function > definition [-Werror=old-style-definition] > qemu/target-avr/translate-inst.c:253:6: error: old-style function > definition [-Werror=old-style-definition] > qemu/target-avr/translate-inst.c:258:6: error: old-style function > definition [-Werror=old-style-definition] > qemu/include/migration/qemu-file.h:204:5: error: ‘temp’ is used > uninitialized in this function [-Werror=uninitialized] > > The last is particularly egregious since the code is completely broken. > > (2) There are still patches not folded back into the originals. > (3) There are still unheeded changes that were asked for in v4 with > respect to the sample-io device, and the simulator board. > > > r~ > -- Best Regards, Michael Rolnik