Use pci_bar_map() instead of a mapping function. Signed-off-by: Blue Swirl <blauwir...@gmail.com> --- hw/ne2000.c | 66 +++++++++++++++++++++++++++++++++++++++------------------- 1 files changed, 44 insertions(+), 22 deletions(-)
diff --git a/hw/ne2000.c b/hw/ne2000.c index 126e7cf..2b1e1ad 100644 --- a/hw/ne2000.c +++ b/hw/ne2000.c @@ -464,6 +464,18 @@ uint32_t ne2000_ioport_read(void *opaque, uint32_t addr) return ret; } +static IOPortWriteFunc * const ne2000_io_writes[] = { + ne2000_ioport_write, + NULL, + NULL, +}; + +static IOPortReadFunc * const ne2000_io_reads[] = { + ne2000_ioport_read, + NULL, + NULL, +}; + static inline void ne2000_mem_writeb(NE2000State *s, uint32_t addr, uint32_t val) { @@ -611,6 +623,18 @@ static uint32_t ne2000_asic_ioport_readl(void *opaque, uint32_t addr) return ret; } +static IOPortWriteFunc * const ne2000_asic_io_writes[] = { + ne2000_asic_ioport_write, + ne2000_asic_ioport_write, + ne2000_asic_ioport_writel, +}; + +static IOPortReadFunc * const ne2000_asic_io_reads[] = { + ne2000_asic_ioport_read, + ne2000_asic_ioport_read, + ne2000_asic_ioport_readl, +}; + void ne2000_reset_ioport_write(void *opaque, uint32_t addr, uint32_t val) { /* nothing to do (end of reset pulse) */ @@ -623,6 +647,18 @@ uint32_t ne2000_reset_ioport_read(void *opaque, uint32_t addr) return 0; } +static IOPortWriteFunc * const ne2000_reset_io_writes[] = { + ne2000_reset_ioport_write, + NULL, + NULL, +}; + +static IOPortReadFunc * const ne2000_reset_io_reads[] = { + ne2000_reset_ioport_read, + NULL, + NULL, +}; + static int ne2000_post_load(void* opaque, int version_id) { NE2000State* s = opaque; @@ -678,26 +714,6 @@ static const VMStateDescription vmstate_pci_ne2000 = { /***********************************************************/ /* PCI NE2000 definitions */ -static void ne2000_map(PCIDevice *pci_dev, int region_num, - pcibus_t addr, pcibus_t size, int type) -{ - PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev); - NE2000State *s = &d->ne2000; - - register_ioport_write(addr, 16, 1, ne2000_ioport_write, s); - register_ioport_read(addr, 16, 1, ne2000_ioport_read, s); - - register_ioport_write(addr + 0x10, 1, 1, ne2000_asic_ioport_write, s); - register_ioport_read(addr + 0x10, 1, 1, ne2000_asic_ioport_read, s); - register_ioport_write(addr + 0x10, 2, 2, ne2000_asic_ioport_write, s); - register_ioport_read(addr + 0x10, 2, 2, ne2000_asic_ioport_read, s); - register_ioport_write(addr + 0x10, 4, 4, ne2000_asic_ioport_writel, s); - register_ioport_read(addr + 0x10, 4, 4, ne2000_asic_ioport_readl, s); - - register_ioport_write(addr + 0x1f, 1, 1, ne2000_reset_ioport_write, s); - register_ioport_read(addr + 0x1f, 1, 1, ne2000_reset_ioport_read, s); -} - static void ne2000_cleanup(VLANClientState *nc) { NE2000State *s = DO_UPCAST(NICState, nc, nc)->opaque; @@ -718,6 +734,7 @@ static int pci_ne2000_init(PCIDevice *pci_dev) PCINE2000State *d = DO_UPCAST(PCINE2000State, dev, pci_dev); NE2000State *s; uint8_t *pci_conf; + int io_index; pci_conf = d->dev.config; pci_config_set_vendor_id(pci_conf, PCI_VENDOR_ID_REALTEK); @@ -726,9 +743,14 @@ static int pci_ne2000_init(PCIDevice *pci_dev) /* TODO: RST# value should be 0. PCI spec 6.2.4 */ pci_conf[PCI_INTERRUPT_PIN] = 1; // interrupt pin 0 - pci_register_bar(&d->dev, 0, 0x100, - PCI_BASE_ADDRESS_SPACE_IO, ne2000_map); s = &d->ne2000; + pci_register_bar(&d->dev, 0, 0x100, PCI_BASE_ADDRESS_SPACE_IO, NULL); + io_index = cpu_register_io(ne2000_io_reads, ne2000_io_writes, 16, s); + pci_bar_map(&d->dev, 0, 0, 0, 16, io_index); + io_index = cpu_register_io(ne2000_asic_io_reads, ne2000_asic_io_writes, 4, s); + pci_bar_map(&d->dev, 0, 1, 0x10, 4, io_index); + io_index = cpu_register_io(ne2000_reset_io_reads, ne2000_reset_io_writes, 1, s); + pci_bar_map(&d->dev, 0, 2, 0x1f, 1, io_index); s->irq = d->dev.irq[0]; qemu_macaddr_default_if_unset(&s->c.macaddr); -- 1.7.1