On 23 June 2016 at 03:15, Andrew Jeffery <and...@aj.id.au> wrote: > The magic constant configures the following options: > > * 28:27: Configure DRAM size as 256MB > * 26:24: DDR3 SDRAM with CL = 6, CWL = 5 > * 23: Configure 24/48MHz CLKIN > * 22: Disable GPIOE pass-through mode > * 21: Disable GPIOD pass-through mode > * 20: Enable LPC decode of SuperIO 0x2E/0x4E addresses > * 19: Disable ACPI > * 18: Configure 48MHz CLKIN > * 17: Disable BMC 2nd boot watchdog timer > * 16: Decode SuperIO address 0x2E > * 15: VGA Class Code > * 14: Enable LPC dedicated reset pin > * 13:12: Enable SPI Master and SPI Slave to AHB Bridge > * 11:10: Select CPU:AHB ratio = 2:1 > * 9:8: Select 384MHz H-PLL > * 7: Configure MAC#2 for RMII/NCSI > * 6: Configure MAC#1 for RMII/NCSI > * 5: No VGA BIOS ROM > * 4: Boot using 32bit SPI address mode > * 3:2: Select 16MB VGA memory > * 1:0: Boot from SPI flash memory
Maybe we should say this in a comment in the code? > Signed-off-by: Andrew Jeffery <and...@aj.id.au> > --- > hw/arm/palmetto-bmc.c | 2 ++ > 1 file changed, 2 insertions(+) > > diff --git a/hw/arm/palmetto-bmc.c b/hw/arm/palmetto-bmc.c > index a51d960510ee..b8eed21348d8 100644 > --- a/hw/arm/palmetto-bmc.c > +++ b/hw/arm/palmetto-bmc.c > @@ -44,6 +44,8 @@ static void palmetto_bmc_init(MachineState *machine) > &bmc->ram); > object_property_add_const_link(OBJECT(&bmc->soc), "ram", > OBJECT(&bmc->ram), > &error_abort); > + object_property_set_int(OBJECT(&bmc->soc), 0x120CE416, "hw-strap1", > + &error_abort); > object_property_set_bool(OBJECT(&bmc->soc), true, "realized", > &error_abort); Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
