Hi,
This pull request adds MIPS CPS features needed to boot MIPSr6 SMP Linux on
multiple VPs, renames MIPS64R6-generic to I6400 and adds 10-bit ASID support.
Thanks,
Leon
Cc: Peter Maydell <peter.mayd...@linaro.org>
Cc: Aurelien Jarno <aurel...@aurel32.net>
The following changes since commit e2c8f9e44e07d8210049abaa6042ec3c956f1dd4:
Merge remote-tracking branch 'remotes/thibault/tags/samuel-thibault' into
staging (2016-07-04 10:49:17 +0100)
are available in the git repository at:
git://github.com/lalrae/qemu.git tags/mips-20160712
for you to fetch changes up to cdc46fab07a122dfcc8a1054510a68d936ae3440:
target-mips: enable 10-bit ASIDs in I6400 CPU (2016-07-12 09:10:21 +0100)
----------------------------------------------------------------
MIPS patches 2016-07-12
Changes:
* support 10-bit ASIDs
* MIPS64R6-generic renamed to I6400
* initial GIC support
* implement RESET_BASE register in CM GCR
----------------------------------------------------------------
Leon Alrae (6):
hw/mips/cps: create GIC block inside CPS
target-mips: add exception base to MIPS CPU
hw/mips_cpc: make VP correctly start from the reset vector
hw/mips_cmgcr: implement RESET_BASE register in CM GCR
target-mips: replace MIPS64R6-generic with the real I6400 CPU model
target-mips: enable 10-bit ASIDs in I6400 CPU
Paul Burton (3):
target-mips: add ASID mask field and replace magic values
target-mips: change ASID type to hold more than 8 bits
target-mips: support CP0.Config4.AE bit
Yongbok Kim (2):
hw/mips: implement GIC Interval Timer
hw/mips: implement Global Interrupt Controller
hw/intc/Makefile.objs | 1 +
hw/intc/mips_gic.c | 460 +++++++++++++++++++++++++++++++++++++++
hw/mips/cps.c | 25 ++-
hw/mips/mips_malta.c | 4 +-
hw/misc/mips_cmgcr.c | 87 +++++++-
hw/misc/mips_cpc.c | 5 +-
hw/timer/Makefile.objs | 1 +
hw/timer/mips_gictimer.c | 142 ++++++++++++
include/hw/intc/mips_gic.h | 216 ++++++++++++++++++
include/hw/mips/cps.h | 2 +
include/hw/misc/mips_cmgcr.h | 27 +++
include/hw/timer/mips_gictimer.h | 46 ++++
target-mips/cpu.h | 7 +-
target-mips/helper.c | 16 +-
target-mips/machine.c | 10 +-
target-mips/op_helper.c | 33 +--
target-mips/translate.c | 11 +-
target-mips/translate_init.c | 22 +-
18 files changed, 1059 insertions(+), 56 deletions(-)
create mode 100644 hw/intc/mips_gic.c
create mode 100644 hw/timer/mips_gictimer.c
create mode 100644 include/hw/intc/mips_gic.h
create mode 100644 include/hw/timer/mips_gictimer.h
