On 14/07/16 13:25, Alex Bennée wrote: > Sergey Fedorov <sergey.fedo...@linaro.org> writes: > >> > From: Sergey Fedorov <serge.f...@gmail.com> >> > >> > These functions will be used to make translation block invalidation safe >> > with concurrent lockless lookup in the global hash table. >> > >> > Most targets don't use 'cs_base'; so marking TB as invalid is as simple >> > as assigning -1 to 'cs_base'. SPARC target stores the next program >> > counter into 'cs_base', and -1 is a fine invalid value since PC must bet >> > a multiple of 4 in SPARC. The only odd target is i386, for which a >> > special flag is introduced in place of removed 'HF_SOFTMMU_MASK'. >> > >> > Suggested-by: Paolo Bonzini <pbonz...@redhat.com> >> > Signed-off-by: Sergey Fedorov <serge.f...@gmail.com> >> > Signed-off-by: Sergey Fedorov <sergey.fedo...@linaro.org> > This has merge conflicts with the current state of master. Is there > anyway to have a common implementation that is specialised only when > needed? >
The point was to put the assumptions on invalid CPU TB state as close to cpu_get_tb_cpu_state() definitions as possible. So that if anyone make changes they can notice those assumptions and correct them if necessary. Kind regards Sergey
