> On 22 Jul 2016, at 15:00, Michael Walle <mich...@walle.cc> wrote: > > 64 bit user mode doesn't work for the e5500 core because the MSR_CM bit is > not set which enables the 64 bit mode for this MMU model. Memory addresses > are truncated to 32 bit, which results in "Invalid data memory access" > error messages. Fix it by setting the MSR_CM bit for this MMU model. > > Signed-off-by: Michael Walle <mich...@walle.cc> > --- > target-ppc/translate_init.c | 3 +++ > 1 file changed, 3 insertions(+) > > diff --git a/target-ppc/translate_init.c b/target-ppc/translate_init.c > index 5ecafc7..1ebb143 100644 > --- a/target-ppc/translate_init.c > +++ b/target-ppc/translate_init.c > @@ -10218,6 +10218,9 @@ static void ppc_cpu_reset(CPUState *s) > if (env->mmu_model & POWERPC_MMU_64) { > msr |= (1ULL << MSR_SF); > } > + if (env->mmu_model == POWERPC_MMU_BOOKE206) {
Is this check correct? Doesn’t e500mc adhere to 2.06 as well? Running qemu-system-ppc64 -M ppce500 -cpu e500mc … is perfectly valid and should just work. With your patch, it would start in invalid 64bit mode :). Alex