Hi all, I want to partially implement AT STK500 <http://www.atmel.com/tools/STK500.aspx?tab=documents> board in order to run FreeRTOS AVR / ATMegaAVR <http://www.freertos.org/a00090.html#ATMEL> demo. if you look into ATmega32 <http://www.atmel.com/images/doc2503.pdf> documentation you will see that, for example, Timer/Countet1 registers are held together at memory addresses [0x46 .. 0xff], but interrupt masks and enable bits are at some other place, actually 0x58 .. 0x59. Every board has its own interrupt masks and enable registers, because number of devices and their types may vary.
what is the right solution? A: 1. create every device as a true memory mapped QEMU device, which will expose all its interrupts as gpio lines 2. create architecture specific "interrupt controller", which will consume all interrupts and aggregate them. unless there is no device with registers/bits scattered between different locations. B: 1. create non memory mapped devices. Each device will export the following functions 1. avr_<device>_init 2. avr_<device>_read_<register> 3. avr_<device>_write_<register> 2. create "big" memory mapped device, which will cover the whole IO space and it will call _read_/_write_ functions of the devices when there is an access to specific address in the IO memory space. -- Best Regards, Michael Rolnik