On Fri, Sep 02, 2016 at 05:19:21PM +1000, Benjamin Herrenschmidt wrote: > On Fri, 2016-09-02 at 12:02 +0530, Nikunj A Dadhania wrote: > > The series is a first attempt at enabling Multi-Threaded TCG on PowerPC. > > Changes that were needed to enable PowerPC are pretty simple; > > > > Patch 01: Take a iothread lock during hcall, as hcall can generate io > > requests > > 02: For TCG, we were harcoding smt as 1, this gets rid of the > > limitation > > If we do this, we need to implement the shared SPRs properly and the > inter-thread doorbells...
Exactly. I think we want to get MTTCG working with multiple emulated cores first, then look into handling emulated hardware multi-threading. 2/4 suggests you are conflating the two, when they're really not related AFAICT. > > > 03: Use atomic_cmpxchg in store conditional > > 04: With more threads, flush the entry from each cpu. > > This can be optimized further. > > > > The patches are based on the Alex Bennee's base enabling patches for > > MTTCG[1] and Emilios's cmpxchg atomics. The consolidated tree of the > > above patches is here: > > > > https://github.com/stsquad/qemu/tree/mttcg/base-patches-v4-with-cmpxchg-atomics-v2 > > > > Apart from the above, PPC patches are based out of ppc-for-2.8 and > > load/store consolidation patches [2] > > > > Series with all dependent patches available here: > > https://github.com/nikunjad/qemu/tree/ppc_mttcg_v1 > > > > Testing: > > ======== > > > > -smp 4,cores=1,threads=4 -accel tcg,thread=multi > > > > TODO > > ==== > > Implement msgsndp instructions(door-bell), newer kernels enable it > > depending on the PVR. I have been using following workaround to boot. > > https://github.com/nikunjad/qemu/commit/2c10052c5f93418a6b920e6ba3ce1813fcf50bc4 > > > > [1] https://www.mail-archive.com/qemu-devel@nongnu.org/msg391966.html > > [2] https://lists.gnu.org/archive/html/qemu-ppc/2016-08/msg00265.html > > > > Nikunj A Dadhania (4): > > spapr-hcall: take iothread lock during handler call > > target-ppc: with MTTCG report more threads > > target-ppc: use atomic_cmpxchg for ld/st reservation > > target-ppc: flush tlb from all the cpu > > > > cputlb.c | 15 +++++++++++++++ > > hw/ppc/spapr_hcall.c | 11 +++++++++-- > > include/exec/exec-all.h | 2 ++ > > target-ppc/kvm.c | 2 +- > > target-ppc/kvm_ppc.h | 2 +- > > target-ppc/mmu-hash64.c | 2 +- > > target-ppc/translate.c | 24 +++++++++++++++++++++--- > > 7 files changed, 50 insertions(+), 8 deletions(-) > > > -- David Gibson | I'll have my music baroque, and my code david AT gibson.dropbear.id.au | minimalist, thank you. NOT _the_ _other_ | _way_ _around_! http://www.ozlabs.org/~dgibson
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