On 23 November 2016 at 12:39, <vijay.kil...@gmail.com> wrote: > From: Vijaya Kumar K <vijaya.ku...@cavium.com> > > This actually implements pre_save and post_load methods for in-kernel > vGICv3. > > Signed-off-by: Pavel Fedin <p.fe...@samsung.com> > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > [PMM: > * use decimal, not 0bnnn > * fixed typo in names of ICC_APR0R_EL1 and ICC_AP1R_EL1 > * completely rearranged the get and put functions to read and write > the state in a natural order, rather than mixing distributor and > redistributor state together] > Signed-off-by: Vijaya Kumar K <vijaya.ku...@cavium.com> > [Vijay: > * Update macro KVM_VGIC_ATTR > * Use 32 bit access for gicd and gicr > * GICD_IROUTER, GICD_TYPER, GICR_PROPBASER and GICR_PENDBASER reg > access are changed from 64-bit to 32-bit access > * Add ICC_SRE_EL1 save and restore > * Dropped translate_fn mechanism and coded functions to handle > save and restore of edge_trigger and priority > * Number of APnR register saved/restored based on number of > priority bits supported] > --- > --- > hw/intc/arm_gicv3_kvm.c | 559 > ++++++++++++++++++++++++++++++++++++++++++++++- > hw/intc/gicv3_internal.h | 1 + > 2 files changed, 549 insertions(+), 11 deletions(-)
Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> thanks -- PMM
