On 16 December 2016 at 13:22, <marcin.krzemin...@nokia.com> wrote: > From: Marcin Krzeminski <marcin.krzemin...@nokia.com> > > In case of MultiCPU SoC M3 is not always CPU0. > This commit add cpu_id property to allow set CPU > number for NVIC model. Also address space that this used > by NVIC is updated to mach CPU's one. > > Signed-off-by: Marcin Krzeminski <marcin.krzemin...@nokia.com>
The right fix for this I think is probably for the NVIC to have an actual pointer to its CPU object, which the armv7m_init code sets up (perhaps with QOM links?) when it creates the CPU and the NVIC. The two really do need to be closely coupled, and the CPU already has a pointer to its NVIC. There's no need for the NVIC to get the CPU pointer by looking it up by CPU ID. Once I've got the GICv3 virtualization out of the way, the next thing on my todo list is to pick up the NVIC refactoring that Michael Davidsaver posted last year: https://lists.nongnu.org/archive/html/qemu-devel/2015-12/msg00504.html which makes some moves in that direction (though it doesn't init the NVIC's CPU pointer with a link, it just assumes first_cpu). thanks -- PMM
