From: Artyom Tarasenko <atar4q...@gmail.com> Accordinf to UA2005, 9.3.3 "Address Space Identifiers",
"In hyperprivileged mode, all instruction fetches and loads and stores with implicit ASIs use a physical address, regardless of the value of TL". Signed-off-by: Artyom Tarasenko <atar4q...@gmail.com> Message-Id: <6c5b3d85dcfabe9935687ecb986e80ce71f89cab.1484165352.git.atar4q...@gmail.com> Signed-off-by: Richard Henderson <r...@twiddle.net> --- target/sparc/cpu.h | 4 ++-- target/sparc/translate.c | 6 +++++- 2 files changed, 7 insertions(+), 3 deletions(-) diff --git a/target/sparc/cpu.h b/target/sparc/cpu.h index 113ae33..4f709e1 100644 --- a/target/sparc/cpu.h +++ b/target/sparc/cpu.h @@ -716,10 +716,10 @@ static inline int cpu_mmu_index(CPUSPARCState *env, bool ifetch) ? (env->lsu & IMMU_E) == 0 || (env->pstate & PS_RED) != 0 : (env->lsu & DMMU_E) == 0) { return MMU_PHYS_IDX; - } else if (env->tl > 0) { - return MMU_NUCLEUS_IDX; } else if (cpu_hypervisor_mode(env)) { return MMU_HYPV_IDX; + } else if (env->tl > 0) { + return MMU_NUCLEUS_IDX; } else if (cpu_supervisor_mode(env)) { return MMU_KERNEL_IDX; } else { diff --git a/target/sparc/translate.c b/target/sparc/translate.c index b898898..82f9965 100644 --- a/target/sparc/translate.c +++ b/target/sparc/translate.c @@ -2142,7 +2142,11 @@ static DisasASI get_asi(DisasContext *dc, int insn, TCGMemOp memop) case ASI_TWINX_NL: case ASI_NUCLEUS_QUAD_LDD: case ASI_NUCLEUS_QUAD_LDD_L: - mem_idx = MMU_NUCLEUS_IDX; + if (hypervisor(dc)) { + mem_idx = MMU_HYPV_IDX; + } else { + mem_idx = MMU_NUCLEUS_IDX; + } break; case ASI_AIUP: /* As if user primary */ case ASI_AIUPL: /* As if user primary LE */ -- 2.9.3