On 01/24/2017 12:31 PM, Alex Bennée wrote: >> Why don't we just pass in this bitmap in the first place? It's much better >> than having to use varargs in tlb_flush_by_mmuidx... > > We could. By not messing with the API it leaves the door open to having > other non-MTTCG architectures that have lots of MMU indexes versus a > hard limit based on page-size. That said I think the number of indexes > also affects the size of the TLB so I guess the current design is > limited for arbitrarily large sets if indexes?
We hard-limit at 12 indices, though even that is arguably too high. I hope we never see more than PPC's current 8. > Is ARM is the current outlier for this functionality? Apart from SPARC's > two uses are we likely to see more architectures using this? In theory, Alpha could use it to avoid ever flushing MMU_PHYS_IDX. It appears that there are a few others that could also avoid flushing a "mmu-disabled" index. I suspect that PPC could make good use of it as well. That one's complicated enough that it probably needs a good going over -- especially for the non-local flushes. r~
