From: Michael Davidsaver <mdavidsa...@gmail.com>
When we take an exception for an undefined instruction, set the
appropriate CFSR bit.
Signed-off-by: Michael Davidsaver <mdavidsa...@gmail.com>
Reviewed-by: Alex Bennée <alex.ben...@linaro.org>
Message-id: 1485285380-10565-7-git-send-email-peter.mayd...@linaro.org
[PMM: tweaked commit message, comment]
Signed-off-by: Peter Maydell <peter.mayd...@linaro.org>
---
target/arm/helper.c | 1 +
1 file changed, 1 insertion(+)
diff --git a/target/arm/helper.c b/target/arm/helper.c
index 7dc30f5..e6b1c36 100644
--- a/target/arm/helper.c
+++ b/target/arm/helper.c
@@ -6072,6 +6072,7 @@ void arm_v7m_cpu_do_interrupt(CPUState *cs)
switch (cs->exception_index) {
case EXCP_UDEF:
armv7m_nvic_set_pending(env->nvic, ARMV7M_EXCP_USAGE);
+ env->v7m.cfsr |= R_V7M_CFSR_UNDEFINSTR_MASK;
return;
case EXCP_SWI:
/* The PC already points to the next instruction. */
--
2.7.4
