Hi, Your series seems to have some coding style problems. See output below for more information:
Type: series Subject: [Qemu-devel] [PATCH v2 00/20] Emulate guest vector operations with host vector operations Message-id: 1485951502-28774-1-git-send-email-batuz...@ispras.ru === TEST SCRIPT BEGIN === #!/bin/bash BASE=base n=1 total=$(git log --oneline $BASE.. | wc -l) failed=0 # Useful git options git config --local diff.renamelimit 0 git config --local diff.renames True commits="$(git log --format=%H --reverse $BASE..)" for c in $commits; do echo "Checking PATCH $n/$total: $(git log -n 1 --format=%s $c)..." if ! git show $c --format=email | ./scripts/checkpatch.pl --mailback -; then failed=1 echo fi n=$((n+1)) done exit $failed === TEST SCRIPT END === Updating 3c8cf5a9c21ff8782164d1def7f44bd888713384 From https://github.com/patchew-project/qemu * [new tag] patchew/1485951502-28774-1-git-send-email-batuz...@ispras.ru -> patchew/1485951502-28774-1-git-send-email-batuz...@ispras.ru Switched to a new branch 'test' 02942b7 tcg/README: update README to include information about vector opcodes 44febfa target/arm: load two consecutive 64-bits vector regs as a 128-bit vector reg 8b2f8a3 tcg/i386: add support for qemu_ld_v128/qemu_st_v128 ops ae2a31c softmmu: create helpers for vector loads 26f10d4 tcg: introduce qemu_ld_v128 and qemu_st_v128 opcodes a5a8f82 tcg: introduce new TCGMemOp - MO_128 e0d0067 tcg: do not rely on exact values of MO_BSWAP or MO_SIGN in backend 8233c86 tcg/i386: support remaining vector addition operations 9bd34b5 tcg/i386: support 64-bit vector operations 773dc86 tcg/i386: add support for vector opcodes 4896d8b target/arm: use vector opcode to handle vadd.<size> instruction 8117d04 target/arm: support access to vector guest registers as globals 6eb8190 tcg: add vector addition operations 003734a tcg: allow globals to overlap 0b4f31e tcg: use results of alias analysis in liveness analysis 5dc7612 tcg: add simple alias analysis 8b1630f tcg: add ld_v128, ld_v64, st_v128 and st_v64 opcodes ec6b284 tcg: support representing vector type with smaller vector or scalar types 2e9c5ae tcg: add support for 64bit vector type 61f938a tcg: add support for 128bit vector type === OUTPUT BEGIN === Checking PATCH 1/20: tcg: add support for 128bit vector type... Checking PATCH 2/20: tcg: add support for 64bit vector type... Checking PATCH 3/20: tcg: support representing vector type with smaller vector or scalar types... Checking PATCH 4/20: tcg: add ld_v128, ld_v64, st_v128 and st_v64 opcodes... Checking PATCH 5/20: tcg: add simple alias analysis... ERROR: spaces required around that ':' (ctx:VxE) #81: FILE: tcg/optimize.c:1472: + CASE_OP_32_64(movi): ^ ERROR: spaces required around that ':' (ctx:VxE) #85: FILE: tcg/optimize.c:1476: + CASE_OP_32_64(mov): ^ ERROR: spaces required around that ':' (ctx:VxE) #90: FILE: tcg/optimize.c:1481: + CASE_OP_32_64(add): ^ ERROR: spaces required around that ':' (ctx:VxE) #91: FILE: tcg/optimize.c:1482: + CASE_OP_32_64(sub): ^ ERROR: spaces required around that ':' (ctx:VxE) #101: FILE: tcg/optimize.c:1492: + CASE_OP_32_64(ld8s): ^ ERROR: spaces required around that ':' (ctx:VxE) #102: FILE: tcg/optimize.c:1493: + CASE_OP_32_64(ld8u): ^ ERROR: spaces required around that ':' (ctx:VxE) #106: FILE: tcg/optimize.c:1497: + CASE_OP_32_64(ld16s): ^ ERROR: spaces required around that ':' (ctx:VxE) #107: FILE: tcg/optimize.c:1498: + CASE_OP_32_64(ld16u): ^ ERROR: spaces required around that ':' (ctx:VxE) #125: FILE: tcg/optimize.c:1516: + CASE_OP_32_64(st8): ^ ERROR: spaces required around that ':' (ctx:VxE) #129: FILE: tcg/optimize.c:1520: + CASE_OP_32_64(st16): ^ total: 10 errors, 0 warnings, 196 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 6/20: tcg: use results of alias analysis in liveness analysis... Checking PATCH 7/20: tcg: allow globals to overlap... Checking PATCH 8/20: tcg: add vector addition operations... Checking PATCH 9/20: target/arm: support access to vector guest registers as globals... ERROR: that open brace { should be on the previous line #38: FILE: target/arm/translate.c:82: +static const char *regnames_q[] = + { "q0", "q1", "q2", "q3", "q4", "q5", "q6", "q7", ERROR: that open brace { should be on the previous line #42: FILE: target/arm/translate.c:86: +static const char *regnames_d[] = + { "d0", "d1", "d2", "d3", "d4", "d5", "d6", "d7", total: 2 errors, 0 warnings, 52 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 10/20: target/arm: use vector opcode to handle vadd.<size> instruction... Checking PATCH 11/20: tcg/i386: add support for vector opcodes... Checking PATCH 12/20: tcg/i386: support 64-bit vector operations... Checking PATCH 13/20: tcg/i386: support remaining vector addition operations... ERROR: spaces required around that ':' (ctx:VxE) #102: FILE: tcg/i386/tcg-target.inc.c:2404: + OP_V128_ALL(add): ^ ERROR: spaces required around that ':' (ctx:VxE) #103: FILE: tcg/i386/tcg-target.inc.c:2405: + OP_V64_ALL(add): ^ total: 2 errors, 0 warnings, 121 lines checked Your patch has style problems, please review. If any of these errors are false positives report them to the maintainer, see CHECKPATCH in MAINTAINERS. Checking PATCH 14/20: tcg: do not rely on exact values of MO_BSWAP or MO_SIGN in backend... Checking PATCH 15/20: tcg: introduce new TCGMemOp - MO_128... Checking PATCH 16/20: tcg: introduce qemu_ld_v128 and qemu_st_v128 opcodes... Checking PATCH 17/20: softmmu: create helpers for vector loads... Checking PATCH 18/20: tcg/i386: add support for qemu_ld_v128/qemu_st_v128 ops... Checking PATCH 19/20: target/arm: load two consecutive 64-bits vector regs as a 128-bit vector reg... Checking PATCH 20/20: tcg/README: update README to include information about vector opcodes... === OUTPUT END === Test command exited with code: 1 --- Email generated automatically by Patchew [http://patchew.org/]. Please send your feedback to patchew-de...@freelists.org