On Wed, May 17, 2017 at 05:20:31PM +1000, David Gibson wrote: > On Wed, May 17, 2017 at 12:45:39PM +0530, Bharata B Rao wrote: > > On Wed, May 17, 2017 at 05:00:49PM +1000, David Gibson wrote: > > > On Wed, May 17, 2017 at 09:19:22AM +0530, Bharata B Rao wrote: > > > > Fix migration of radix guests by ensuring that we issue > > > > KVM_PPC_CONFIGURE_V3_MMU for radix case post migration. > > > > > > > > Reported-by: Nageswara R Sastry <rnsas...@linux.vnet.ibm.com> > > > > Signed-off-by: Bharata B Rao <bhar...@linux.vnet.ibm.com> > > > > --- > > > > hw/ppc/spapr.c | 15 +++++++++++++++ > > > > hw/ppc/spapr_hcall.c | 1 + > > > > include/hw/ppc/spapr.h | 1 + > > > > 3 files changed, 17 insertions(+) > > > > > > > > diff --git a/hw/ppc/spapr.c b/hw/ppc/spapr.c > > > > index 05abfc1..dd1d687 100644 > > > > --- a/hw/ppc/spapr.c > > > > +++ b/hw/ppc/spapr.c > > > > @@ -1443,6 +1443,20 @@ static int spapr_post_load(void *opaque, int > > > > version_id) > > > > err = spapr_rtc_import_offset(&spapr->rtc, spapr->rtc_offset); > > > > } > > > > > > > > + if (spapr->patb_entry) { > > > > + if (kvmppc_has_cap_mmu_radix() && kvm_enabled()) { > > > > + err = kvmppc_configure_v3_mmu(POWERPC_CPU(first_cpu), > > > > + spapr->patb_flags & > > > > + SPAPR_PROC_TABLE_RADIX, > > > > + spapr->patb_flags & > > > > + SPAPR_PROC_TABLE_GTSE, > > > > > > You should be able to work out the things you need here from > > > patb_entry without adding the new patb_flags field. > > > > kvmppc_configure_v3_mmu() needs two bools: radix and gtse. The radix > > bit can be implied from patb_entry, I needed patb_flags to get the > > gtse value. Not immediately obvious of how to get gtse bit from patb_entry, > > but let me take a relook. > > Oh, sorry, you can't get GTSE from the patb_entry, but you can get it > from the LPCR.
So I need to get GTSE from LPCR at the target after the LPCR has been updated from the incoming stream (via vmstate_ppc_cpu vmsd). However we are also in the middle of processing the incoming stream here (via spapr_post_load). Can we be sure that spapr_post_load() processing happens after all SPRs (and hence LPCR) have been updated via vmstate_ppc_cpu vmsd handlers ? Also, in addition to issuing KVM_PPC_CONFIGURE_V3_MMU, should we be walking all the CPUs and setting the LPCR_UPRT and LPCR_GTSE bits like how H_REGISTER_PROC_TBL does ? Regards, Bharata.