Hello, This short series introduces a basic model for the Aspeed ADC and glues it into the generic Aspeed SoC definition. The register interface is enhanced slightly from the AST2400 to the AST2500, but in a backwards-compatible way by making use of reserved bits. As such I haven't made any effort to differentiate the two.
The addition of a basic ADC model allows the Aspeed SDK kernel to boot under QEMU's ast2500-evb machine. The upstream kernel driver doesn't test the initialisation bit before completing its probe(), and thus doesn't get stuck if the bit is not set. This is in contrast to the SDK kernel which spins on the initialisation bit, never making forward progress in the absence of the ADC model. Tested with both Aspeed's SDK kernel and upstream Linux. Cheers, Andrew Andrew Jeffery (2): hw/adc: Add basic Aspeed ADC model hw/arm: Integrate ADC model into Aspeed SoC hw/adc/Makefile.objs | 1 + hw/adc/aspeed_adc.c | 246 ++++++++++++++++++++++++++++++++++++++++++++ hw/arm/aspeed_soc.c | 15 +++ include/hw/adc/aspeed_adc.h | 33 ++++++ include/hw/arm/aspeed_soc.h | 2 + 5 files changed, 297 insertions(+) create mode 100644 hw/adc/aspeed_adc.c create mode 100644 include/hw/adc/aspeed_adc.h -- 2.9.3