On 05/25/2017 01:50 PM, Aurelien Jarno wrote:
On 2017-05-24 12:22, Richard Henderson wrote:
(1) The OR of the low bits or R1 into INSN were not being done
consistently; it was forgotten along all but the SVC path.

It was done for the logical ops assuming the instruction has the
corresponding byte set to 0, as in that case it matches the length
and is passed directly as an argument to the helper.

I agree that was the assumption, but it's still technically wrong.


r~

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