On 06/21/2017 09:15 PM, Michael Rolnik wrote:
Hi all,
are there any action items for me?
What kind of testing are you doing for this?
I just briefly browsed through the code again and happened to see that ROR has
a critical typo. Considering that ROR must be used for multi-byte shifts, I'm
wondering how you wouldn't have found this via even cursory testing.
+int avr_translate_ROR(CPUAVRState *env, DisasContext *ctx, uint32_t opcode)
+{
+ TCGv Rd = cpu_r[ROR_Rd(opcode)];
+ TCGv t0 = tcg_temp_new_i32();
+
+ tcg_gen_shli_tl(t0, cpu_Cf, 7);
+ tcg_gen_andi_tl(cpu_Cf, Rd, 0);
r~
