Hi Cedric, On Wed, 2017-07-12 at 19:19 +0200, Cédric Le Goater wrote: > Hi, > > Today, if you try to hotplug a CPU on a POWER9 guest (TCG), it fails > with an assert on the LPCR_UPRT bit missing in > ppc_radix64_handle_mmu_fault() > > (qemu) device_add POWER9_v1.0-spapr-cpu-core,core-id=4,id=foo > (qemu) [ 12.766102] pseries-hotplug-cpu: Attempting to add CPU, > drc index: 10000004 > qemu-system-ppc64: ./target/ppc/mmu-radix64.c:204: > ppc_radix64_handle_mmu_fault: Assertion `ppc64_use_proc_tbl(cpu)' > failed. > Aborted (core dumped) > > The LPCR SPR is incorrectly set. I have hacked my way through to > make > it work, by changing cpu_ppc_set_papr(), but this is really ugly and > certainly wrong.
Yes this is happening because the guest is radix (the bit is set in the process table) however the UPRT (use process tables) bit is not set in the LPCR, which is a requirement when in radix mode (there is no other way to translate addresses than to use process tables). Thus in the radix mmu emulation code the assert is failing (as you document above). I assume this is because when the hot-plugged cpu is added it is in the default state. For TCG at least the default state is assumed to be hash page tables (not radix). We set the UPRT bit in the LPCR and radix bit for the guest when handling the H_REGISTER_PROC_TBL hcall. > > I would happy to cook the fix, as I need it for XIVE development. > What > would be the correct approach ? I'm not sure what the code path is when hot plugging a cpu, but you would need to do some checks on the state of the guest and the other cpus and setup the cpu which you are adding appropriately. In this circumstance it would be checking if the guest is radix (there is already a function in target/ppc/mmu-book3s-v3.h ppc64_radix_guest()) and setting up the cpu state for the new cpu appropriately (i.e. setting the LPCR bits). > > Thanks, > > C.