From: Lluís Vilanova <vilan...@ac.upc.edu>
Incrementally paves the way towards using the generic instruction translation
loop.
Signed-off-by: Lluís Vilanova <vilan...@ac.upc.edu>
Reviewed-by: Emilio G. Cota <c...@braap.org>
Reviewed-by: Richard Henderson <r...@twiddle.net>
Reviewed-by: Alex Benneé <alex.be...@linaro.org>
Message-Id: <150002146647.22386.13380064201042141261.st...@frigg.lan>
Signed-off-by: Richard Henderson <r...@twiddle.net>
---
target/i386/translate.c | 9 ++++++++-
1 file changed, 8 insertions(+), 1 deletion(-)
diff --git a/target/i386/translate.c b/target/i386/translate.c
index 651abca..6e1243a 100644
--- a/target/i386/translate.c
+++ b/target/i386/translate.c
@@ -8448,6 +8448,13 @@ static int i386_tr_init_disas_context(DisasContextBase
*dcbase, CPUState *cpu,
return max_insns;
}
+static void i386_tr_insn_start(DisasContextBase *dcbase, CPUState *cpu)
+{
+ DisasContext *dc = container_of(dcbase, DisasContext, base);
+
+ tcg_gen_insn_start(dc->base.pc_next, dc->cc_op);
+}
+
/* generate intermediate code for basic block 'tb'. */
void gen_intermediate_code(CPUState *cs, TranslationBlock *tb)
{
@@ -8475,7 +8482,7 @@ void gen_intermediate_code(CPUState *cs, TranslationBlock
*tb)
num_insns = 0;
gen_tb_start(tb);
for(;;) {
- tcg_gen_insn_start(dc->base.pc_next, dc->cc_op);
+ i386_tr_insn_start(&dc->base, cs);
num_insns++;
/* If RF is set, suppress an internally generated breakpoint. */
--
2.9.4
