On 2017-07-16 01:22, Aurelien Jarno wrote: > On 2017-07-06 16:20, Richard Henderson wrote: > > As for other targets, cmpxchg isn't quite right for ll/sc, > > suffering from an ABA race, but is sufficient to implement > > portable atomic operations. > > > > Signed-off-by: Richard Henderson <r...@twiddle.net> > > --- > > target/sh4/cpu.h | 3 ++- > > target/sh4/translate.c | 56 > > +++++++++++++++++++++++++++++++++----------------- > > 2 files changed, 39 insertions(+), 20 deletions(-) > > For the linux-user case, where we need to emulate sequences that needs > to be executed on multiple CPUs, while the ISA has been designed for > a single CPU, this patch looks good. There is no real other way to do > it. > > For the system case, one might imagine using MOVLI/MOVCO with a > different address, although 1) it hasn't been designed for that 2) all > the sequences I have found use the same address. I therefore wonder if > we should just add the code to correctly clear LDST in case of interrupt > or exception.
I guess the patch for the system case is as simple as: --- a/target/sh4/helper.c +++ b/target/sh4/helper.c @@ -86,6 +86,9 @@ void superh_cpu_do_interrupt(CPUState *cs) int do_irq = cs->interrupt_request & CPU_INTERRUPT_HARD; int do_exp, irq_vector = cs->exception_index; + /* LDST flag is cleared by an exception or an interrupt. */ + env->ldst = 0; + /* prioritize exceptions over interrupts */ do_exp = cs->exception_index != -1; Of course to integrate it with your patch it means adding the #ifdef #else #endif around the system and the user version. -- Aurelien Jarno GPG: 4096R/1DDD8C9B aurel...@aurel32.net http://www.aurel32.net