On 07/17/2017 05:18 PM, Philippe Mathieu-Daudé wrote:
On 05/12/2017 09:08 PM, Richard Henderson wrote:
On 05/12/2017 04:38 PM, Philippe Mathieu-Daudé wrote:
[...]
static inline void gen_op_add_cc(TCGv dst, TCGv src1, TCGv src2)
@@ -638,8 +634,7 @@ static inline void gen_op_mulscc(TCGv dst, TCGv src1,
TCGv src2)
// env->y = (b2 << 31) | (env->y >> 1);
tcg_gen_andi_tl(r_temp, cpu_cc_src, 0x1);
tcg_gen_shli_tl(r_temp, r_temp, 31);
- tcg_gen_shri_tl(t0, cpu_y, 1);
- tcg_gen_andi_tl(t0, t0, 0x7fffffff);
+ tcg_gen_extract_tl(t0, cpu_y, 1, 31);
tcg_gen_or_tl(t0, t0, r_temp);
tcg_gen_andi_tl(cpu_y, t0, 0xffffffff);
So this 0xffffffff mask is incorrect and should be 0x7fffffff?
No, this has nothing to do with the second andi.
r~
