On 07/27/2017 07:43 PM, Philippe Mathieu-Daudé wrote:
On 07/27/2017 07:59 AM, Peter Maydell wrote:
[...]
- u32p += env->cp15.c6_rgnr;
+ u32p += env->pmsav7.rnr;
tlb_flush(CPU(cpu)); /* Mappings may have changed - purge! */
*u32p = value;
}
@@ -2447,7 +2447,7 @@ static const ARMCPRegInfo pmsav7_cp_reginfo[] = {
.readfn = pmsav7_read, .writefn = pmsav7_write, .resetfn =
pmsav7_reset },
{ .name = "RGNR", .cp = 15, .crn = 6, .opc1 = 0, .crm = 2, .opc2
= 0,
"RGNR" -> "RNR"
Ah "RGNR" for -R and "RNR" for -M hmmm... still better keep the name
matching the field, "rnr".
.access = PL1_RW,
- .fieldoffset = offsetof(CPUARMState, cp15.c6_rgnr),
+ .fieldoffset = offsetof(CPUARMState, pmsav7.rnr),
.writefn = pmsav7_rgnr_write },
pmsav7_rnr_write
REGINFO_SENTINEL
};
diff --git a/target/arm/machine.c b/target/arm/machine.c
index 1a40469..93c1a78 100644
--- a/target/arm/machine.c
+++ b/target/arm/machine.c
@@ -151,7 +151,7 @@ static bool pmsav7_rgnr_vmstate_validate(void
*opaque, int version_id)
pmsav7_rnr_vmstate_validate()
{
ARMCPU *cpu = opaque;
- return cpu->env.cp15.c6_rgnr < cpu->pmsav7_dregion;
+ return cpu->env.pmsav7.rnr < cpu->pmsav7_dregion;
}
static const VMStateDescription vmstate_pmsav7 = {
[...]
VMSTATE_VALIDATE("rgnr is valid", pmsav7_rgnr_vmstate_validate),
also this one "rnr is valid" ^^^
once fixed:
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>