Signed-off-by: Lluís Vilanova <vilan...@ac.upc.edu> --- accel/tcg/translator.c | 3 +++ trace-events | 8 ++++++++ 2 files changed, 11 insertions(+)
diff --git a/accel/tcg/translator.c b/accel/tcg/translator.c index 91b3b0da32..287d27b4f7 100644 --- a/accel/tcg/translator.c +++ b/accel/tcg/translator.c @@ -69,6 +69,8 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ while (true) { + target_ulong pc_insn = db->pc_next; + db->num_insns++; ops->insn_start(db, cpu); tcg_debug_assert(db->is_jmp == DISAS_NEXT); /* no early exit */ @@ -96,6 +98,7 @@ void translator_loop(const TranslatorOps *ops, DisasContextBase *db, if (db->num_insns == 1) { trace_guest_bbl_before_tcg(cpu, tcg_ctx.tcg_env, db->pc_first); } + trace_guest_inst_before_tcg(cpu, tcg_ctx.tcg_env, pc_insn); /* Disassemble one instruction. The translate_insn hook should update db->pc_next and db->is_jmp to indicate what should be diff --git a/trace-events b/trace-events index d242f54254..46457c6158 100644 --- a/trace-events +++ b/trace-events @@ -99,6 +99,14 @@ vcpu guest_cpu_reset(void) # Targets: TCG(all) vcpu tcg guest_bbl_before(uint64_t vaddr) "vaddr=0x%016"PRIx64, "vaddr=0x%016"PRIx64 +# @vaddr: Instruction's virtual address +# +# Mark start of instruction execution (before anything gets really executed). +# +# Mode: user, softmmu +# Targets: TCG(all) +vcpu tcg guest_inst_before(uint64_t vaddr) "vaddr=0x%016"PRIx64, "vaddr=0x%016"PRIx64 + # @vaddr: Access' virtual address. # @info : Access' information (see below). #