On 09/19/2017 12:30 PM, Philippe Mathieu-Daudé wrote: > On 09/19/2017 01:13 PM, Richard Henderson wrote: >> [ Just saw this, so missed adding tags to the v2 patch set. ] >> >> On 09/14/2017 11:53 PM, Philippe Mathieu-Daudé wrote: >>> At least this msg disappeared: >>> >>> "Disassembler disagrees with translator over instruction decoding" >> >> It's back in v2. >> >>> For i386, arm, mips32/64: >>> Tested-by: Philippe Mathieu-Daudé <f4...@amsat.org> >> >> Which patches? Which mips versions? > > full series, Malta board default cpu > >> Can you, by any chance, test micro-mips? I'm certain I've got that wrong in >> the v1 patch, and thus I dropped the mips patch from v2. But in theory >> capstone supports umips too and should be trivially fixable. > > $ mipsel-softmmu/qemu-system-mipsel -machine malta -cpu M14Kc -append "ttyS0 > rw" -nographic -d in_asm -kernel vmlinux -initrd initrd.gz > > IN: kernel_entry > 0x801039e0: syscall 0x3f004 > 0x801039e4: b 0x8011406c > -0x801039e8: addu t2,zero,ra > -0x801039ec: c0 0x900028 > -0x801039f0: 0x1f7108 > -0x801039f4: syscall 0xbf004 > +0x801039e8: addu $t2, $zero, $ra
This is indicative of the other bug that I fixed in v2, where we would silently ignore unknown instructions. >From this and the other hunks it would appear that either (1) I messed up the CS_MODE_* bits for mips or (2) the capstone backend for mips is not in terribly good shape. I think I was right to drop the patch from v2. r~