On Thu, Oct 05, 2017 at 03:50:52PM +0200, Igor Mammedov wrote:
> Signed-off-by: Igor Mammedov <imamm...@redhat.com>
> Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org>
Less lines of code, thanks.
Acked-by: Stafford Horne <sho...@gmail.com>
> ---
> CC: sho...@gmail.com
> ---
> hw/openrisc/openrisc_sim.c | 8 ++------
> 1 file changed, 2 insertions(+), 6 deletions(-)
>
> diff --git a/hw/openrisc/openrisc_sim.c b/hw/openrisc/openrisc_sim.c
> index 86bf284..f61b63d 100644
> --- a/hw/openrisc/openrisc_sim.c
> +++ b/hw/openrisc/openrisc_sim.c
> @@ -98,18 +98,13 @@ static void cpu_openrisc_load_kernel(ram_addr_t ram_size,
> static void openrisc_sim_init(MachineState *machine)
> {
> ram_addr_t ram_size = machine->ram_size;
> - const char *cpu_model = machine->cpu_model;
> const char *kernel_filename = machine->kernel_filename;
> OpenRISCCPU *cpu = NULL;
> MemoryRegion *ram;
> int n;
>
> - if (!cpu_model) {
> - cpu_model = "or1200";
> - }
> -
> for (n = 0; n < smp_cpus; n++) {
> - cpu = OPENRISC_CPU(cpu_generic_init(TYPE_OPENRISC_CPU, cpu_model));
> + cpu = OPENRISC_CPU(cpu_create(machine->cpu_type));
> qemu_register_reset(main_cpu_reset, cpu);
> main_cpu_reset(cpu);
> }
> @@ -138,6 +133,7 @@ static void openrisc_sim_machine_init(MachineClass *mc)
> mc->init = openrisc_sim_init;
> mc->max_cpus = 1;
> mc->is_default = 1;
> + mc->default_cpu_type = OPENRISC_CPU_TYPE_NAME("or1200");
> }
>
> DEFINE_MACHINE("or1k-sim", openrisc_sim_machine_init)
> --
> 2.7.4
>
