This patchset is mostly implementation of SG, BLXNS and secure function return. Parts of it were in the previous patchset, but had a bug which I've fixed in the SG implementation where we read the first half of the insn twice by mistake.
Patch 1 is a new trivial bugfix. Patches 2-4 were in the previous set; only 2 has changed. Patches 5-8 perform some refactoring so that we can correctly implement the behaviour of a handful of Thumb instructions which must be unconditional even when they appear inside an IT block: SG, HLT and BKPT. Patch 9 implements the final edge cases of the SG insn. The refactoring has the nice property that we don't have to pass the CPU env pointer into the bulk of the thumb decode functions any more. I suspect it also might fix bugs in setting breakpoints on instructions inside IT blocks, though we haven't had any complaints about that so perhaps gdb works around it by setting breakpoints on both the cc pass and cc fail next instructions in an IT block... Peter Maydell (9): target/arm: Add M profile secure MMU index values to get_a32_user_mem_index() target/arm: Implement SG instruction target/arm: Implement BLXNS target/arm: Implement secure function return target-arm: Don't check for "Thumb2 or M profile" for not-Thumb1 target/arm: Pull Thumb insn word loads up to top level target-arm: Simplify insn_crosses_page() target/arm: Support some Thumb insns being always unconditional target/arm: Implement SG instruction corner cases target/arm/helper.h | 1 + target/arm/internals.h | 8 ++ target/arm/helper.c | 306 +++++++++++++++++++++++++++++++++++++++++++++--- target/arm/translate.c | 310 +++++++++++++++++++++++++++++++++---------------- 4 files changed, 515 insertions(+), 110 deletions(-) -- 2.7.4