On 15/10/2017 19:53, Stefan Weil wrote: >> I see your arguments. Maybe that part can be removed from my patch >> when it is applied, or should I send a v3 (cc'ing qemu-trivial)?
Sending v3 to trivial makes sense. > While thinking more about that line of code, I wonder whether > it would make sense to replace the byte r/w by a 32 bit r/w. > Would that be faster on architectures with a 32 bit memory bus? In practice this goes to the cache, so it's not affected by the size of the write. Paolo
