From: Peter Maydell <peter.mayd...@linaro.org> For faults on loads and stores, ppc_cpu_handle_mmu_fault() in target/ppc/user_only_helper.c stores the offending address in env->spr[SPR_DAR]. Report this correctly to the guest in si_addr, rather than incorrectly using the address of the instruction that caused the fault.
This fixes the test case in https://bugs.launchpad.net/qemu/+bug/1077116 for ppc, ppc64 and ppc64le. Reviewed-by: Laurent Vivier <laur...@vivier.eu> Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> Signed-off-by: Riku Voipio <riku.voi...@linaro.org> --- linux-user/main.c | 2 +- 1 file changed, 1 insertion(+), 1 deletion(-) diff --git a/linux-user/main.c b/linux-user/main.c index b6dd9efd2d..6286661bd3 100644 --- a/linux-user/main.c +++ b/linux-user/main.c @@ -1420,7 +1420,7 @@ void cpu_loop(CPUPPCState *env) info.si_code = TARGET_SEGV_MAPERR; break; } - info._sifields._sigfault._addr = env->nip; + info._sifields._sigfault._addr = env->spr[SPR_DAR]; queue_signal(env, info.si_signo, QEMU_SI_FAULT, &info); break; case POWERPC_EXCP_ISI: /* Instruction storage exception */ -- 2.14.2