On 11/26/2017 10:35 AM, Mark Cave-Ayland wrote: > Signed-off-by: Mark Cave-Ayland <mark.cave-ayl...@ilande.co.uk>
Reviewed-by: Philippe Mathieu-Daudé <f4...@amsat.org> > --- > hw/sparc64/sun4u_iommu.c | 17 +++-------------- > hw/sparc64/trace-events | 4 ++++ > 2 files changed, 7 insertions(+), 14 deletions(-) > > diff --git a/hw/sparc64/sun4u_iommu.c b/hw/sparc64/sun4u_iommu.c > index 612fec4..51fbc39 100644 > --- a/hw/sparc64/sun4u_iommu.c > +++ b/hw/sparc64/sun4u_iommu.c > @@ -30,16 +30,7 @@ > #include "exec/address-spaces.h" > #include "qapi/error.h" > #include "qemu/log.h" > - > -/* debug IOMMU */ > -//#define DEBUG_IOMMU > - > -#ifdef DEBUG_IOMMU > -#define IOMMU_DPRINTF(fmt, ...) \ > -do { printf("IOMMU: " fmt , ## __VA_ARGS__); } while (0) > -#else > -#define IOMMU_DPRINTF(fmt, ...) > -#endif > +#include "trace.h" > > > #define IOMMU_PAGE_SIZE_8K (1ULL << 13) > @@ -201,8 +192,7 @@ static void iommu_mem_write(void *opaque, hwaddr addr, > { > IOMMUState *is = opaque; > > - IOMMU_DPRINTF("IOMMU config write: 0x%" HWADDR_PRIx " val: %" PRIx64 > - " size: %d\n", addr, val, size); > + trace_sun4u_iommu_mem_write(addr, val, size); > > switch (addr) { > case IOMMU_CTRL: > @@ -280,8 +270,7 @@ static uint64_t iommu_mem_read(void *opaque, hwaddr addr, > unsigned size) > break; > } > > - IOMMU_DPRINTF("IOMMU config read: 0x%" HWADDR_PRIx " val: %" PRIx64 > - " size: %d\n", addr, val, size); > + trace_sun4u_iommu_mem_read(addr, val, size); > > return val; > } > diff --git a/hw/sparc64/trace-events b/hw/sparc64/trace-events > index 04d80b7..052352f 100644 > --- a/hw/sparc64/trace-events > +++ b/hw/sparc64/trace-events > @@ -2,3 +2,7 @@ > > # hw/sparc64/sun4u.c > ebus_isa_irq_handler(int n, int level) "Set ISA IRQ %d level %d" > + > +# hw/sparc64/sun4u_iommu.c > +sun4u_iommu_mem_read(uint64_t addr, uint64_t val, int size) "addr: > 0x%"PRIx64" val: 0x%"PRIx64" size: %d" > +sun4u_iommu_mem_write(uint64_t addr, uint64_t val, int size) "addr: > 0x%"PRIx64" val: 0x%"PRIx64" size: %d" >