On 01/12/2017 08:08, Gonglei (Arei) wrote: > First write to 0x70, cmos_index = 0xc & 0x7f = 0xc > CPU 0/KVM-15566 kvm_pio: pio_write at 0x70 size 1 count 1 val 0xc> > Second write to 0x70, cmos_index = 0x86 & 0x7f = 0x6> CPU 1/KVM-15567 > kvm_pio: pio_write at 0x70 size 1 count 1 val 0x86> vcpu0 read 0x6 because > cmos_index is 0x6 now:> CPU 0/KVM-15566 kvm_pio: pio_read at 0x71 size > 1 count 1 val 0x6> vcpu1 read 0x6:> CPU 1/KVM-15567 kvm_pio: pio_read > at 0x71 size 1 count 1 val 0x6 This seems to be a Windows bug. The easiest workaround that I can think of is to clear the interrupts already when 0xc is written, without waiting for the read (because REG_C can only be read).
What do you think? Thanks, Paolo
