On 19 January 2018 at 14:57, <luc.mic...@greensocs.com> wrote:
> From: Luc MICHEL <luc.mic...@git.antfield.fr>
>
> When C_CTRL.CBPR is 1, the Non-Secure view of C_BPR is altered:
> - A Non-Secure read of C_BPR should return the BPR value plus 1,
> saturated to 7,
> - A Non-Secure write should be ignored.
>
> Signed-off-by: Luc MICHEL <luc.mic...@git.antfield.fr>
> ---
> hw/intc/arm_gic.c | 16 +++++++++++++---
> 1 file changed, 13 insertions(+), 3 deletions(-)
>
> diff --git a/hw/intc/arm_gic.c b/hw/intc/arm_gic.c
> index d0a41a89ae..7418b7a082 100644
> --- a/hw/intc/arm_gic.c
> +++ b/hw/intc/arm_gic.c
> @@ -1211,8 +1211,13 @@ static MemTxResult gic_cpu_read(GICState *s, int cpu,
> int offset,
> break;
> case 0x08: /* Binary Point */
> if (s->security_extn && !attrs.secure) {
> - /* BPR is banked. Non-secure copy stored in ABPR. */
> - *data = s->abpr[cpu];
> + if (s->cpu_ctlr[cpu] & GICC_CTLR_CBPR) {
> + /* NS view of BPR when CBPR is 1 */
> + *data = MIN(s->bpr[cpu] + 1, 7);
> + } else {
> + /* BPR is banked. Non-secure copy stored in ABPR. */
> + *data = s->abpr[cpu];
> + }
> } else {
> *data = s->bpr[cpu];
> }
> @@ -1285,7 +1290,12 @@ static MemTxResult gic_cpu_write(GICState *s, int cpu,
> int offset,
> break;
> case 0x08: /* Binary Point */
> if (s->security_extn && !attrs.secure) {
> - s->abpr[cpu] = MAX(value & 0x7, GIC_MIN_ABPR);
> + if (s->cpu_ctlr[cpu] & GICC_CTLR_CBPR) {
> + /* WI when CTLR is 1 */
should be "CBPR", yes?
> + return MEMTX_OK;
> + } else {
> + s->abpr[cpu] = MAX(value & 0x7, GIC_MIN_ABPR);
> + }
> } else {
> s->bpr[cpu] = MAX(value & 0x7, GIC_MIN_BPR);
> }
> --
thanks
-- PMM
