From: Alistair Francis <alistair.fran...@xilinx.com> Connect the MicroBlaze CPU and the ROM and RAM memory regions.
Signed-off-by: Alistair Francis <alistair.fran...@xilinx.com> Reviewed-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> Signed-off-by: Edgar E. Iglesias <edgar.igles...@xilinx.com> --- hw/microblaze/xlnx-zynqmp-pmu.c | 70 +++++++++++++++++++++++++++++++++++++++-- 1 file changed, 68 insertions(+), 2 deletions(-) diff --git a/hw/microblaze/xlnx-zynqmp-pmu.c b/hw/microblaze/xlnx-zynqmp-pmu.c index ac0f789..145837b 100644 --- a/hw/microblaze/xlnx-zynqmp-pmu.c +++ b/hw/microblaze/xlnx-zynqmp-pmu.c @@ -18,8 +18,11 @@ #include "qemu/osdep.h" #include "qapi/error.h" #include "qemu-common.h" +#include "exec/address-spaces.h" #include "hw/boards.h" +#include "hw/qdev-properties.h" #include "cpu.h" +#include "boot.h" /* Define the PMU device */ @@ -27,21 +30,56 @@ #define XLNX_ZYNQMP_PMU_SOC(obj) OBJECT_CHECK(XlnxZynqMPPMUSoCState, (obj), \ TYPE_XLNX_ZYNQMP_PMU_SOC) +#define XLNX_ZYNQMP_PMU_ROM_SIZE 0x8000 +#define XLNX_ZYNQMP_PMU_ROM_ADDR 0xFFD00000 +#define XLNX_ZYNQMP_PMU_RAM_ADDR 0xFFDC0000 + typedef struct XlnxZynqMPPMUSoCState { /*< private >*/ DeviceState parent_obj; /*< public >*/ + MicroBlazeCPU cpu; } XlnxZynqMPPMUSoCState; static void xlnx_zynqmp_pmu_soc_init(Object *obj) { + XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(obj); + object_initialize(&s->cpu, sizeof(s->cpu), + TYPE_MICROBLAZE_CPU); + object_property_add_child(obj, "pmu-cpu", OBJECT(&s->cpu), + &error_abort); } static void xlnx_zynqmp_pmu_soc_realize(DeviceState *dev, Error **errp) { - + XlnxZynqMPPMUSoCState *s = XLNX_ZYNQMP_PMU_SOC(dev); + Error *err = NULL; + + object_property_set_uint(OBJECT(&s->cpu), XLNX_ZYNQMP_PMU_ROM_ADDR, + "base-vectors", &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "use-stack-protection", + &error_abort); + object_property_set_uint(OBJECT(&s->cpu), 0, "use-fpu", &error_abort); + object_property_set_uint(OBJECT(&s->cpu), 0, "use-hw-mul", &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "use-barrel", + &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "use-msr-instr", + &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "use-pcmp-instr", + &error_abort); + object_property_set_bool(OBJECT(&s->cpu), false, "use-mmu", &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "endianness", + &error_abort); + object_property_set_str(OBJECT(&s->cpu), "8.40.b", "version", + &error_abort); + object_property_set_uint(OBJECT(&s->cpu), 0, "pvr", &error_abort); + object_property_set_bool(OBJECT(&s->cpu), true, "realized", &err); + if (err) { + error_propagate(errp, err); + return; + } } static void xlnx_zynqmp_pmu_soc_class_init(ObjectClass *oc, void *data) @@ -70,7 +108,35 @@ type_init(xlnx_zynqmp_pmu_soc_register_types) static void xlnx_zynqmp_pmu_init(MachineState *machine) { - + XlnxZynqMPPMUSoCState *pmu = g_new0(XlnxZynqMPPMUSoCState, 1); + MemoryRegion *address_space_mem = get_system_memory(); + MemoryRegion *pmu_rom = g_new(MemoryRegion, 1); + MemoryRegion *pmu_ram = g_new(MemoryRegion, 1); + + /* Create the ROM */ + memory_region_init_rom(pmu_rom, NULL, "xlnx-zynqmp-pmu.rom", + XLNX_ZYNQMP_PMU_ROM_SIZE, &error_fatal); + memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_ROM_ADDR, + pmu_rom); + + /* Create the RAM */ + memory_region_init_ram(pmu_ram, NULL, "xlnx-zynqmp-pmu.ram", + machine->ram_size, &error_fatal); + memory_region_add_subregion(address_space_mem, XLNX_ZYNQMP_PMU_RAM_ADDR, + pmu_ram); + + /* Create the PMU device */ + object_initialize(pmu, sizeof(XlnxZynqMPPMUSoCState), TYPE_XLNX_ZYNQMP_PMU_SOC); + object_property_add_child(OBJECT(machine), "pmu", OBJECT(pmu), + &error_abort); + object_property_set_bool(OBJECT(pmu), true, "realized", &error_fatal); + + /* Load the kernel */ + microblaze_load_kernel(&pmu->cpu, XLNX_ZYNQMP_PMU_RAM_ADDR, + machine->ram_size, + machine->initrd_filename, + machine->dtb, + NULL); } static void xlnx_zynqmp_pmu_machine_init(MachineClass *mc) -- 2.7.4