On 6 March 2018 at 12:28, Alex Bennée <alex.ben...@linaro.org> wrote: > > Richard Henderson <richard.hender...@linaro.org> writes: > >> As an implementation choice, widening VL has zeroed the >> previously inaccessible portion of the sve registers. >> >> Reviewed-by: Peter Maydell <peter.mayd...@linaro.org> >> Signed-off-by: Richard Henderson <richard.hender...@linaro.org>
>> + int old_vq = (env->vfp.zcr_el[1] & 0xf) + 1; >> + int vq = MAX(arg2 / 16, 1); >> + >> + if (vq < old_vq) { >> + aarch64_sve_narrow_vq(env, vq); >> + } >> + env->vfp.zcr_el[1] = vq - 1; > > It seems odd not to have setting this inside cpu64.c. Won't a similar > manipulation need to be made for system mode? I'd keep all the logic > together in aarch64_sve_narrow_vq (or maybe call it aarch64_sve_set_vq > and pass it the current exception level). I think I asked Richard to put it into linux-user because it was in target/arm in an earlier version of this series. The manipulation that's happening here is kind of linux-specific (if it were for system mode we'd need to think about ZCR_EL2 and ZCR_EL3 as well), and the analogy is with cpu_set_tls/cpu_get_tls which are in linux-user/arm/target_cpu.h. NB: I've already put this series in target-arm.next -- do you want me to drop them ? (That would mean they won't go in 2.12, given RTH is away.) thanks -- PMM