NOTE: This is a continuous discussion in thread but in patch format: https://lists.gnu.org/archive/html/qemu-devel/2018-06/msg00824.html
Hi, Peter, Please have a look on whether this tiny series will work for your TCG work. I only tested it with x86 with existing qtests. No further test is done. I only want to show what I meant to pass in MemTxAttrs instead of the new IOMMU index logic. I only used the USER bit as an example. Of course in the future we can add more bits in the MemTxAttrs to monitor upon. And the series only provided the interface change, no real use case is provided. It's very possible that I misunderstood some of the requirement of the TCG work; please feel free to point it out where I missed. Thanks, Peter Xu (3): memory: add MemTxAttrs to translate function memory: add MemTxAttrs to IOMMUTLBEntry memory: introduce IOMMU_NOTIFIER_USER_[UN]SET include/exec/memory.h | 60 ++++++++++++++++++++++++++++++++++++---- exec.c | 2 +- hw/alpha/typhoon.c | 3 +- hw/arm/smmuv3.c | 2 +- hw/dma/rc4030.c | 6 ++-- hw/i386/amd_iommu.c | 2 +- hw/i386/intel_iommu.c | 6 ++-- hw/ppc/spapr_iommu.c | 3 +- hw/s390x/s390-pci-bus.c | 6 ++-- hw/sparc/sun4m_iommu.c | 3 +- hw/sparc64/sun4u_iommu.c | 3 +- hw/virtio/vhost.c | 2 +- memory.c | 13 ++++++++- 13 files changed, 90 insertions(+), 21 deletions(-) -- 2.17.0