> On Jun 24, 2018, at 12:18 AM, Richard Henderson > <richard.hender...@linaro.org> wrote: > > On 06/23/2018 01:17 PM, Programmingkid wrote: >>>> https://www.pdfdrive.net/powerpc-microprocessor-family-the-programming-environments-for-32-e3087633.html >>>> This document has the information on the fdiv. Page 133 has the >>>> information on what action is executed when a division by zero situation >>>> takes place. > > Even in your referenced PDF, table 3-13, it says that frD is unmodified.
Actually it says when FPSCR[ZE] is set is when frD is unmodified. When FPSCR[ZE] is not set it frD's sign is determined by an XOR of the signs of the operands. I have verified that this is what happens on real PowerPC 750 and 950 CPUs. > >>> struct sigaction a = { .sa_sigaction = handle, .sa_flags = SA_SIGINFO }; >>> sigaction(SIGFPE, &a, NULL); >>> feenableexcept(FE_ALL_EXCEPT); >> >> This is C99 code. There are a lot of floating point bugs with this >> implementation. I suggest all future testing be done using PowerPC assembly >> language only. > > Um.. have you really ever seen an implementation that won't set ZE? I do know that when I did try to use C99 floating point code I saw a lot of problems. Bypassing any library issues by directly setting the FPSCR is best for testing. Table 2-4 in the pdf has information on the FPSCR. > >> What compiler did you use to compile this program? > > gcc 7.2. > >> What operating system did you run this program on? > > CentOS 7, so kernel 3.10, glibc 2.17. > >> What are the specs of the system you used to test this program on? > > CHRP IBM,8231-E2B (Power7). I was just wondering are you able to run a PowerPC operating system in QEMU in KVM mode on this Power7 computer? Thank you.