Le 26/06/2018 à 18:56, Peter Maydell a écrit : > Add support for MMU protection regions that are smaller than > TARGET_PAGE_SIZE. We do this by marking the TLB entry for those > pages with a flag TLB_RECHECK. This flag causes us to always > take the slow-path for accesses. In the slow path we can then > special case them to always call tlb_fill() again, so we have > the correct information for the exact address being accessed. > > This change allows us to handle reading and writing from small > regions; we cannot deal with execution from the small region. > > Signed-off-by: Peter Maydell <peter.mayd...@linaro.org> > Reviewed-by: Richard Henderson <richard.hender...@linaro.org> > Message-id: 20180620130619.11362-2-peter.mayd...@linaro.org > --- > accel/tcg/softmmu_template.h | 24 ++++--- > include/exec/cpu-all.h | 5 +- > accel/tcg/cputlb.c | 131 +++++++++++++++++++++++++++++------ > 3 files changed, 130 insertions(+), 30 deletions(-)
This patch breaks Quadra 800 emulation, any idea why? ABCFGHIJK qemu: fatal: Unable to handle guest executing from RAM within a small MPU region at 0x0014cb5a D0 = 0000006a A0 = 002d8a19 F0 = 7fff ffffffffffffffff ( nan) D1 = 00000010 A1 = 002d8a19 F1 = 7fff ffffffffffffffff ( nan) D2 = 000003e0 A2 = 00332310 F2 = 7fff ffffffffffffffff ( nan) D3 = 00000000 A3 = 00331f98 F3 = 7fff ffffffffffffffff ( nan) D4 = 0036da87 A4 = 0036daa3 F4 = 7fff ffffffffffffffff ( nan) D5 = 000003e0 A5 = 0036de67 F5 = 7fff ffffffffffffffff ( nan) D6 = 002d8a18 A6 = 002d8a1a F6 = 7fff ffffffffffffffff ( nan) D7 = 0014ac46 A7 = 00331ed8 F7 = 7fff ffffffffffffffff ( nan) PC = 0014cb5a SR = 2700 T:0 I:7 SI ----- FPSR = 00000000 ---- -------- ----- FPCR = 0000 X RN -------- A7(MSP) = 00000000 A7(USP) = 00000000 ->A7(ISP) = 00331f38 VBR = 0x00364528 SFC = 0 DFC 0 SSW 00000000 TCR 00008000 URP 00000000 SRP 00001000 DTTR0/1: 00000000/f807a040 ITTR0/1: 00000000/f807a040 MMUSR 00000000, fault at 00000000 Aborted (core dumped) Laurent