[Qemu-devel] RISC-V platform

[G 3]

Hi, I noticed your RISC-V patches on the mailing list and had a  
question that I think you may be able to answer. Has anyone defined a  
RISC-V platform yet? What I mean is defining what devices would be  
found on a RISC-V motherboard. I do hope to see RISC-V based desktop  
systems one day. But before that day can come the platform for this  
chip would have to be established. Could the SiFive board be the  
basis for such a standard?