On Wed, Jul 04, 2018 at 03:38:32PM +0200, Paolo Bonzini wrote: > On 04/07/2018 15:12, Jingqi Liu wrote: > > Add the option split-lock-ac to control whether the #AC > > exception is generated for split locked accesses, which > > is introduced for the machine, there is an example to enable it: > > -machine split-lock-ac=on > > It is disabled on default. > > > > When bit 29 of the MSR (33H) is set, the processor > > causes an #AC exception to be issued instead of suppressing LOCK on > > bus(during split lock access). > > This should be a CPU feature, not a machine feature. As mentioned in > the review of the kernel patch, please work with Robert to use the same > infrastructure for both MSR_TEST_CTL and MSR_IA32_ARCH_CAPABILITIES. > > (Robert, does IceLake have this feature? If so, we cannot create the > CPU model until everything is in place).
I don't think we need to block the CPU model because QEMU+KVM doesn't support some features yet, as long as kernel versions capable of running the 3.0 version of IceLake-Server will be also capable of running the 3.1 version of IceLake-Server. Now, if that condition won't be true and we have some IceLake features that will added only to more recent kernels, it might be a good idea to hold the inclusion of the CPU model until everything is in place. > > BTW, why is the availability of the feature not exposed with a CPUID > bit? It doesn't make much sense. I have the same question. Without a CPUID bit, guests may block the VM from being migrated to older hosts because the additional section for the MSR will appear. -- Eduardo