> Subject: [PATCH v2 31/33] gdbstub: Disable handling of nanoMIPS ISA bit in
> the MIPS gdbstub
>
> From: James Hogan <james.ho...@mips.com>
>
> nanoMIPS has no ISA bit in the PC, so remove the handling of the low bit
> of the PC in the MIPS gdbstub for nanoMIPS. This prevents the PC being
> read as e.g. 0xbfc00001, and prevents writing to the PC clearing
> MIPS_HFLAG_M16.
>
> Signed-off-by: James Hogan <james.ho...@mips.com>
> Signed-off-by: Yongbok Kim <yongbok....@mips.com>
> Signed-off-by: Aleksandar Markovic <amarko...@wavecomp.com>
> Signed-off-by: Stefan Markovic <smarko...@wavecomp.com>
> ---
> target/mips/gdbstub.c | 13 ++++++++-----
> 1 file changed, 8 insertions(+), 5 deletions(-)
>
Reviewed-by: Aleksandar Markovic <amarko...@wavecomp.com>
> diff --git a/target/mips/gdbstub.c b/target/mips/gdbstub.c
> index 18e0e6d..559b69f 100644
> --- a/target/mips/gdbstub.c
> +++ b/target/mips/gdbstub.c
> @@ -60,7 +60,8 @@ int mips_cpu_gdb_read_register(CPUState *cs, uint8_t
> *mem_buf, int n)
> return gdb_get_regl(mem_buf, (int32_t)env->CP0_Cause);
> case 37:
> return gdb_get_regl(mem_buf, env->active_tc.PC |
> - !!(env->hflags & MIPS_HFLAG_M16));
> + (!(env->insn_flags & ISA_NANOMIPS32) &&
> + env->hflags & MIPS_HFLAG_M16));
> case 72:
> return gdb_get_regl(mem_buf, 0); /* fp */
> case 89:
> @@ -131,10 +132,12 @@ int mips_cpu_gdb_write_register(CPUState *cs, uint8_t
> *mem_buf, int n)
> break;
> case 37:
> env->active_tc.PC = tmp & ~(target_ulong)1;
> - if (tmp & 1) {
> - env->hflags |= MIPS_HFLAG_M16;
> - } else {
> - env->hflags &= ~(MIPS_HFLAG_M16);
> + if (!(env->insn_flags & ISA_NANOMIPS32)) {
> + if (tmp & 1) {
> + env->hflags |= MIPS_HFLAG_M16;
> + } else {
> + env->hflags &= ~(MIPS_HFLAG_M16);
> + }
> }
> break;
> case 72: /* fp, ignored */
> --
> 2.7.4
>
>
