RST bit is (1 << 3) bit, not (1 << 2), fix condition
that enables i2s if ENB is set and RST is not set.
Signed-off-by: Vasily Khoruzhick <anars...@gmail.com>
---
hw/pxa2xx.c | 2 +-
1 files changed, 1 insertions(+), 1 deletions(-)
diff --git a/hw/pxa2xx.c b/hw/pxa2xx.c
index d966846..68b67ae 100644
--- a/hw/pxa2xx.c
+++ b/hw/pxa2xx.c
@@ -1631,7 +1631,7 @@ static void pxa2xx_i2s_write(void *opaque,
target_phys_addr_t addr,
}
if (value & (1 << 4)) /* EFWR */
printf("%s: Attempt to use special function\n", __FUNCTION__);
- s->enable = ((value ^ 4) & 5) == 5; /* ENB && !RST*/
+ s->enable = ((value ^ (1 << 3)) & 9) == 9; /* ENB && !RST*/
pxa2xx_i2s_update(s);
break;
case SACR1:
--
1.7.4
