On 08/30/2018 12:30 PM, Craig Janeczek via Qemu-devel wrote:
> +/* S32I2M XRa, rb - Register move from GRF to XRF */
> +static void gen_mxu_s32i2m(DisasContext *ctx, uint32_t opc)
> +{
> + TCGv t0;
> + uint32_t xra, rb;
> +
> + t0 = tcg_temp_new();
> +
> + xra = extract32(ctx->opcode, 6, 5);
> + rb = extract32(ctx->opcode, 16, 5);
> +
> + gen_load_gpr(t0, rb);
> + if (xra <= 15) {
> + gen_store_mxu_gpr(t0, xra);
> + } else if (xra == 16) {
> + gen_store_mxu_cr(t0);
> + }
else...? Illegal instruction / reserved operand fault?
Surely it is not treated as a nop (although stranger things happen).
> +static void gen_mxu_s32m2i(DisasContext *ctx, uint32_t opc)
> +{
> + TCGv t0;
> + uint32_t xra, rb;
> +
> + t0 = tcg_temp_new();
> +
> + xra = extract32(ctx->opcode, 6, 5);
> + rb = extract32(ctx->opcode, 16, 5);
> +
> + if (xra <= 15) {
> + gen_load_mxu_gpr(t0, xra);
> + } else if (xra == 16) {
> + gen_load_mxu_cr(t0);
> + }
> +
> + gen_store_gpr(t0, rb);
Likewise. Although this one will crash qemu, because t0 will be used by
gen_store_gpr without being initialized.
> @@ -17909,6 +17991,7 @@ static void decode_opc_special2_legacy(CPUMIPSState
> *env, DisasContext *ctx)
> check_insn(ctx, INSN_LOONGSON2F);
> gen_loongson_integer(ctx, op1, rd, rs, rt);
> break;
> +
> case OPC_CLO:
Avoid random whitespace changes.
r~
