pxb-pcie may only consumes a subset of 256 busses in a pci domain, but seabios
does not know it unless pxb-pcies passes it to seabios. This patch places
desired mcfg size into a hidden pci bar. The size is calculated based on
desired bus number of a pxb-pcie

Signed-off-by: Zihan Yang <whois.zihan.y...@gmail.com>
---
 hw/pci-bridge/pci_expander_bridge.c         | 5 +++++
 include/hw/pci-bridge/pci_expander_bridge.h | 2 ++
 2 files changed, 7 insertions(+)

diff --git a/hw/pci-bridge/pci_expander_bridge.c 
b/hw/pci-bridge/pci_expander_bridge.c
index 09413df..661de7c 100644
--- a/hw/pci-bridge/pci_expander_bridge.c
+++ b/hw/pci-bridge/pci_expander_bridge.c
@@ -370,6 +370,11 @@ static void pxb_dev_realize_common(PCIDevice *dev, bool 
pcie, Error **errp)
                                PCI_STATUS_66MHZ | PCI_STATUS_FAST_BACK);
     pci_config_set_class(dev->config, PCI_CLASS_BRIDGE_HOST);
 
+    if (pcie && pxb->domain_nr > 0) {
+       pci_set_long(dev->config + PXB_PCIE_HOST_BRIDGE_MCFG_SIZE,
+                    (pxb->max_bus - pxb->bus_nr + 1) * MiB);
+    }
+
     pxb_dev_list = g_list_insert_sorted(pxb_dev_list, pxb, pxb_compare);
     return;
 
diff --git a/include/hw/pci-bridge/pci_expander_bridge.h 
b/include/hw/pci-bridge/pci_expander_bridge.h
index 5be0a8e..9103eaa 100644
--- a/include/hw/pci-bridge/pci_expander_bridge.h
+++ b/include/hw/pci-bridge/pci_expander_bridge.h
@@ -20,4 +20,6 @@ typedef struct PXBPCIEHost {
 /* The mcfg_base of pxb-pcie is not 256MB-aligned, but MB-aligned */
 #define PXB_PCIE_HOST_BRIDGE_PCIEXBAR_ADMSK         Q35_MASK(64, 35, 20)
 
+#define PXB_PCIE_HOST_BRIDGE_MCFG_SIZE              0x58    /* 32bit register 
*/
+
 #endif
-- 
2.7.4


Reply via email to