v1: https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg01146.html
Changes since v1:
- Add tlb_index and tlb_entry helpers from Richard
- Introduce sizeof_tlb() and tlb_n_entries()
- Extract tlb_mask as its own array in CPUArchState, as
suggested by Richard. For the associated helpers (tlb_index etc)
I tried several approaches, and performance-wise they're all
the same, so went for the simplest implementation.
- Use uintptr_t for tlb_mask, as done in Richard's patch
+ tcg/i386: use hrexw when reading tlb_mask
+ Define tlbtype and tlbrexw solely based on TARGET_PAGE_BITS
- Rename tlb_is_invalid to tlb_entry_is_empty, comparing all
fields (except .addend) against -1.
- Rename CPUTLBDesc.used to .n_used_entries.
- Drop the MIN/MAX CPU_TLB_BITS patches, defining instead
some values for MIN/MAX as well as a default.
- Use new_size and old_size consistently in the resizing function,
as suggested by Richard.
- Add an additional chart to the last patch, where softmmu
performance is compared against user-mode:
https://imgur.com/a/eXkjMCE
You can fetch this series from:
https://github.com/cota/qemu/tree/tlb-dyn-v2
Note that it applies on top of my tlb-lock-v4 series:
https://lists.gnu.org/archive/html/qemu-devel/2018-10/msg01421.html
Thanks,
Emilio
